Thow Pang Chong

Person

Penang, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for determining clock uncertainties
- Patent number 8,739,099
- Issue date May 27, 2014
- Altera Corporation
- Victor R. Maruri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predicting routability of integrated circuits
- Patent number 8,694,944
- Issue date Apr 8, 2014
- Altera Corporation
- Sze Huey Soo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency control clock tuning circuitry
- Patent number 8,659,334
- Issue date Feb 25, 2014
- Altera Corporation
- Teik Wah Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Frequency control clock tuning circuitry
- Patent number 8,232,823
- Issue date Jul 31, 2012
- Altera Corporation
- Teik Wah Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of designing integrated circuits including providing an opti...
- Patent number 8,151,224
- Issue date Apr 3, 2012
- Altera Corporation
- Boon Jin Ang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for performing built-in self-test of receiver channel ha...
- Patent number 8,037,377
- Issue date Oct 11, 2011
- Altera Corporation
- Ie Chen Chia
- G01 - MEASURING TESTING
Information Patent Grant
Programmable control of mask-programmable integrated circuit devices
- Patent number 8,037,444
- Issue date Oct 11, 2011
- Altera Corporation
- Boon Jin Ang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
- Patent number 7,843,216
- Issue date Nov 30, 2010
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Delay circuit with delay cells in different orientations
- Patent number 7,683,689
- Issue date Mar 23, 2010
- Altera Corporation
- Tat Mun Lui
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for reducing clock skew in clock routing networks
- Patent number 7,639,047
- Issue date Dec 29, 2009
- Altera Corporation
- Boon Jin Ang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
- Patent number 7,434,192
- Issue date Oct 7, 2008
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for transferring data across different clock domains with se...
- Patent number 7,363,526
- Issue date Apr 22, 2008
- Altera Corporation
- Thow Pang Chong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for combining volatile and non-volatile programmable log...
- Patent number 7,242,218
- Issue date Jul 10, 2007
- Altera Corporation
- Rafael Camarota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal propagation circuitry for use on integrated circuits
- Patent number 7,233,189
- Issue date Jun 19, 2007
- Altera Corporation
- Boon Jin Ang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FREQUENCY CONTROL CLOCK TUNING CIRCUITRY
- Publication number 20120274375
- Publication date Nov 1, 2012
- Teik Wah Lim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BL...
- Publication number 20080297192
- Publication date Dec 4, 2008
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques for optimizing design of a hard intellectual property bl...
- Publication number 20060125517
- Publication date Jun 15, 2006
- Altera Corporation
- Darren van Wageningen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques for combining volatile and non-volatile programmable log...
- Publication number 20060119384
- Publication date Jun 8, 2006
- Altera Corporation
- Rafael Camarota
- G06 - COMPUTING CALCULATING COUNTING

Thow Pang Chong

Person

Patents Grantslast 30 patents

Method and apparatus for determining clock uncertainties

Predicting routability of integrated circuits

Frequency control clock tuning circuitry

Frequency control clock tuning circuitry

Method of designing integrated circuits including providing an opti...

Techniques for performing built-in self-test of receiver channel ha...

Programmable control of mask-programmable integrated circuit devices

Techniques for optimizing design of a hard intellectual property bl...

Delay circuit with delay cells in different orientations

Techniques for reducing clock skew in clock routing networks

Techniques for optimizing design of a hard intellectual property bl...

Method for transferring data across different clock domains with se...

Techniques for combining volatile and non-volatile programmable log...

Signal propagation circuitry for use on integrated circuits

Patents Applicationslast 30 patents

FREQUENCY CONTROL CLOCK TUNING CIRCUITRY

TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BL...

Techniques for optimizing design of a hard intellectual property bl...

Techniques for combining volatile and non-volatile programmable log...