Tim Tri Hoang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for performing clock and data duty cycle corr...
- Patent number 11,115,177
- Issue date Sep 7, 2021
- Intel Corporation
- Yanjing Ke
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for calibrating analog circuitry in an integr...
- Patent number 10,911,164
- Issue date Feb 2, 2021
- Altera Corporation
- Neville Carvalho
- G12 - INSTRUMENT DETAILS
Information Patent Grant
Reset sequencing for reducing noise on a power distribution network
- Patent number 10,242,141
- Issue date Mar 26, 2019
- Altera Corporation
- Jakob Raymond Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for calibrating analog circuitry in an integr...
- Patent number 10,110,328
- Issue date Oct 23, 2018
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital equalizer adaptation using on-die instrument
- Patent number 9,847,893
- Issue date Dec 19, 2017
- Altera Corporation
- Tim Tri Hoang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for reducing power supply noise or jitter
- Patent number 9,748,934
- Issue date Aug 29, 2017
- Altera Corporation
- Kyung Suk Oh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits and methods for impedance calibration
- Patent number 9,680,469
- Issue date Jun 13, 2017
- Altera Corporation
- Kok Siang Tan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop architecture and clock distribution system
- Patent number 9,654,123
- Issue date May 16, 2017
- Altera Corporation
- Tien Duc Pham
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital equalizer adaptation using on-die instrument
- Patent number 9,628,304
- Issue date Apr 18, 2017
- Altera Corporation
- Tim Tri Hoang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transceiver system with reduced latency uncertainty
- Patent number 9,559,881
- Issue date Jan 31, 2017
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multimode current mirror circuitry
- Patent number 9,383,763
- Issue date Jul 5, 2016
- Altera Corporation
- Xiong Liu
- G05 - CONTROLLING REGULATING
Information Patent Grant
Digital equalizer adaptation using on-die instrument
- Patent number 9,379,682
- Issue date Jun 28, 2016
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuits and methods for impedance calibration
- Patent number 9,369,128
- Issue date Jun 14, 2016
- Altera Corporation
- Kok Siang Tan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase-locked loop architecture and clock distribution system
- Patent number 9,350,530
- Issue date May 24, 2016
- Altera Corporation
- Tien Duc Pham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pre-emphasis circuitry including a pre-emphasis voltage variation c...
- Patent number 9,246,715
- Issue date Jan 26, 2016
- Altera Corporation
- Allen Chan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuits and methods for adjusting the voltage swing of a signal
- Patent number 9,231,631
- Issue date Jan 5, 2016
- Altera Corporation
- Yanjing Ke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for noise reduction during calibration
- Patent number 9,203,352
- Issue date Dec 1, 2015
- Altera Corporation
- Tim Tri Hoang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits and methods for data detection
- Patent number 9,136,949
- Issue date Sep 15, 2015
- Altera Corporation
- Shou-Po Shih
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock data recovery circuitry with programmable clock phase selection
- Patent number 9,112,655
- Issue date Aug 18, 2015
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable high-speed voltage-mode differential driver
- Patent number 9,065,399
- Issue date Jun 23, 2015
- Altera Corporation
- Bonnie I. Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Floating-tap decision feedback equalizer
- Patent number 9,025,656
- Issue date May 5, 2015
- Altera Corporation
- Sangeeta Raman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital equalizer adaptation using on-die instrument
- Patent number 9,001,943
- Issue date Apr 7, 2015
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power supply filtering for programmable logic device having heterog...
- Patent number 8,976,804
- Issue date Mar 10, 2015
- Altera Corporation
- Sergey Shumarayev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for varying a periodic signal based on changes in a data...
- Patent number 8,929,498
- Issue date Jan 6, 2015
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for adjusting gears of an oscillator
- Patent number 8,860,482
- Issue date Oct 14, 2014
- Altera Corporation
- Xiong Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for reducing power supply noise or jitter
- Patent number 8,836,384
- Issue date Sep 16, 2014
- Altera Corporation
- Kyung Suk Oh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock and data recovery circuitry with auto-speed negotiation and o...
- Patent number 8,829,958
- Issue date Sep 9, 2014
- Altera Corporation
- Kazi Asaduzzaman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer circuitry including both inductor based and non-inductor...
- Patent number 8,816,745
- Issue date Aug 26, 2014
- Altera Corporation
- Sangeeta Raman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock and data recovery circuitry with auto-speed negotiation and o...
- Patent number 8,811,555
- Issue date Aug 19, 2014
- Altera Corporation
- Kazi Asaduzzaman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique for providing loopback testing with single stage equalizer
- Patent number 8,705,605
- Issue date Apr 22, 2014
- Altera Corporation
- Sangeeta Raman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
FIBER ARRAY UNIT (FAU) DESIGNS TO ENABLE A HIGHER IO BANDWIDTH PER...
- Publication number 20240061192
- Publication date Feb 22, 2024
- Intel Corporation
- Chia-Pin CHIU
- G02 - OPTICS
Information Patent Application
PHOTONICS PACKAGING WITH HIGH-DENSITY ROUTING
- Publication number 20230411369
- Publication date Dec 21, 2023
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COVERED CAVITY FOR A PHOTONIC INTEGRATED CIRCUIT (PIC)
- Publication number 20230341622
- Publication date Oct 26, 2023
- Intel Corporation
- Chia-Pin Chiu
- G02 - OPTICS
Information Patent Application
ON-CAVITY PHOTONIC INTEGRATED CIRCUIT (OCPIC) TO ACHIEVE THE MOST U...
- Publication number 20230314850
- Publication date Oct 5, 2023
- Intel Corporation
- Chia-Pin CHIU
- G02 - OPTICS
Information Patent Application
UNDERCUT DESIGN WITH A BONDED BASE COVER FOR FRIENDLY ASSEMBLY AND...
- Publication number 20230314849
- Publication date Oct 5, 2023
- Intel Corporation
- Chia-Pin CHIU
- G02 - OPTICS
Information Patent Application
TEMPERATURE SENSOR TO ACHIEVE THERMAL STABILIZATION OF MICRO-RING R...
- Publication number 20230314704
- Publication date Oct 5, 2023
- Intel Corporation
- Chia-Pin CHIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR PERFORMING CLOCK AND DATA DUTY CYCLE CORR...
- Publication number 20190215146
- Publication date Jul 11, 2019
- Intel Corporation
- Yanjing Ke
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR CALIBRATING ANALOG CIRCUITRY IN AN INTEGR...
- Publication number 20190028213
- Publication date Jan 24, 2019
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reset Sequencing for Reducing Noise on a Power Distribution Network
- Publication number 20180089355
- Publication date Mar 29, 2018
- Altera Corporation
- Jakob Raymond Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits and Methods For Impedance Calibration
- Publication number 20170237433
- Publication date Aug 17, 2017
- Altera Corporation
- Kok Siang Tan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT
- Publication number 20170214557
- Publication date Jul 27, 2017
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT
- Publication number 20160308694
- Publication date Oct 20, 2016
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT
- Publication number 20150207480
- Publication date Jul 23, 2015
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROGRAMMABLE HIGH-SPEED VOLTAGE-MODE DIFFERENTIAL DRIVER
- Publication number 20140368272
- Publication date Dec 18, 2014
- Bonnie I. WANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT
- Publication number 20140269890
- Publication date Sep 18, 2014
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques for Varying a Periodic Signal Based on Changes in a Data...
- Publication number 20140037033
- Publication date Feb 6, 2014
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR CALIBRATING ANALOG CIRCUITRY IN AN INTEGR...
- Publication number 20130275071
- Publication date Oct 17, 2013
- Neville CARVALHO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK AND DATA RECOVERY CIRCUITRY WITH AUTO-SPEED NEGOTIATION AND O...
- Publication number 20130093482
- Publication date Apr 18, 2013
- Altera Corporation
- Kazi Asaduzzaman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques for Reducing Duty Cycle Distortion in Periodic Signals
- Publication number 20120256670
- Publication date Oct 11, 2012
- Altera Corporation
- Weiqi Ding
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques for Varying a Periodic Signal Based on Changes in a Data...
- Publication number 20120063556
- Publication date Mar 15, 2012
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIGNAL LOSS DETECTOR FOR HIGH-SPEED SERIAL INTERFACE OF A PROGRAMMA...
- Publication number 20110235756
- Publication date Sep 29, 2011
- Altera Corporation
- Weiqi Ding
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK AND DATA RECOVERY CIRCUITRY WITH AUTO-SPEED NEGOTIATION AND O...
- Publication number 20110188621
- Publication date Aug 4, 2011
- Kazi Asaduzzaman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR MULTI-MODE CLOCK DATA RECOVERY
- Publication number 20100119024
- Publication date May 13, 2010
- Sergey Y. Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques For Generating Fractional Clock Signals
- Publication number 20100073094
- Publication date Mar 25, 2010
- Altera Corporation
- Tim Tri Hoang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transceiver system with reduced latency uncertainty
- Publication number 20090161738
- Publication date Jun 25, 2009
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Wide range and dynamically reconfigurable clock data recovery archi...
- Publication number 20090122939
- Publication date May 14, 2009
- Altera Corporation
- Tim Tri Hoang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIGNAL LOSS DETECTOR FOR HIGH-SPEED SERIAL INTERFACE OF A PROGRAMMA...
- Publication number 20090011716
- Publication date Jan 8, 2009
- Altera Corporation
- Weiqi Ding
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Low-power transceiver architectures for programmable logic integrat...
- Publication number 20080258765
- Publication date Oct 23, 2008
- Sergey Shumarayev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase Frequency Detectors Generating Minimum Pulse Widths
- Publication number 20080246516
- Publication date Oct 9, 2008
- Altera Corporation
- Tim Tri Hoang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital adaptation circuitry and methods for programmable logic dev...
- Publication number 20080069276
- Publication date Mar 20, 2008
- Altera Corporation
- Wilson Wong
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Tim Tri Hoang

Person

Patents Grantslast 30 patents

Methods and apparatus for performing clock and data duty cycle corr...

Apparatus and methods for calibrating analog circuitry in an integr...

Reset sequencing for reducing noise on a power distribution network

Apparatus and methods for calibrating analog circuitry in an integr...

Digital equalizer adaptation using on-die instrument

Systems and methods for reducing power supply noise or jitter

Circuits and methods for impedance calibration

Phase-locked loop architecture and clock distribution system

Digital equalizer adaptation using on-die instrument

Transceiver system with reduced latency uncertainty

Multimode current mirror circuitry

Digital equalizer adaptation using on-die instrument

Circuits and methods for impedance calibration

Phase-locked loop architecture and clock distribution system

Pre-emphasis circuitry including a pre-emphasis voltage variation c...

Circuits and methods for adjusting the voltage swing of a signal

Techniques for noise reduction during calibration

Circuits and methods for data detection

Clock data recovery circuitry with programmable clock phase selection

Programmable high-speed voltage-mode differential driver

Floating-tap decision feedback equalizer

Digital equalizer adaptation using on-die instrument

Power supply filtering for programmable logic device having heterog...

Techniques for varying a periodic signal based on changes in a data...

Techniques for adjusting gears of an oscillator

Systems and methods for reducing power supply noise or jitter

Clock and data recovery circuitry with auto-speed negotiation and o...

Equalizer circuitry including both inductor based and non-inductor...

Clock and data recovery circuitry with auto-speed negotiation and o...

Technique for providing loopback testing with single stage equalizer

Patents Applicationslast 30 patents

FIBER ARRAY UNIT (FAU) DESIGNS TO ENABLE A HIGHER IO BANDWIDTH PER...

PHOTONICS PACKAGING WITH HIGH-DENSITY ROUTING

COVERED CAVITY FOR A PHOTONIC INTEGRATED CIRCUIT (PIC)

ON-CAVITY PHOTONIC INTEGRATED CIRCUIT (OCPIC) TO ACHIEVE THE MOST U...

UNDERCUT DESIGN WITH A BONDED BASE COVER FOR FRIENDLY ASSEMBLY AND...

TEMPERATURE SENSOR TO ACHIEVE THERMAL STABILIZATION OF MICRO-RING R...

METHODS AND APPARATUS FOR PERFORMING CLOCK AND DATA DUTY CYCLE CORR...

APPARATUS AND METHODS FOR CALIBRATING ANALOG CIRCUITRY IN AN INTEGR...

Reset Sequencing for Reducing Noise on a Power Distribution Network

Circuits and Methods For Impedance Calibration

DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT

DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT

DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT

PROGRAMMABLE HIGH-SPEED VOLTAGE-MODE DIFFERENTIAL DRIVER

DIGITAL EQUALIZER ADAPTATION USING ON-DIE INSTRUMENT

Techniques for Varying a Periodic Signal Based on Changes in a Data...

APPARATUS AND METHODS FOR CALIBRATING ANALOG CIRCUITRY IN AN INTEGR...

CLOCK AND DATA RECOVERY CIRCUITRY WITH AUTO-SPEED NEGOTIATION AND O...

Techniques for Reducing Duty Cycle Distortion in Periodic Signals

Techniques for Varying a Periodic Signal Based on Changes in a Data...

SIGNAL LOSS DETECTOR FOR HIGH-SPEED SERIAL INTERFACE OF A PROGRAMMA...

CLOCK AND DATA RECOVERY CIRCUITRY WITH AUTO-SPEED NEGOTIATION AND O...

METHOD AND APPARATUS FOR MULTI-MODE CLOCK DATA RECOVERY

Techniques For Generating Fractional Clock Signals

Transceiver system with reduced latency uncertainty

Wide range and dynamically reconfigurable clock data recovery archi...

SIGNAL LOSS DETECTOR FOR HIGH-SPEED SERIAL INTERFACE OF A PROGRAMMA...

Low-power transceiver architectures for programmable logic integrat...

Phase Frequency Detectors Generating Minimum Pulse Widths

Digital adaptation circuitry and methods for programmable logic dev...