Tim V. Pham

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Defective die replacement in a die stack
- Patent number 10,177,052
- Issue date Jan 8, 2019
- NXP USA, INC.
- Perry H. Pelley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stack address bus having a programmable width
- Patent number 10,002,653
- Issue date Jun 19, 2018
- NXP USA, INC.
- Perry H. Pelley
- G11 - INFORMATION STORAGE
Information Patent Grant
Matrix lid heatspreader for flip chip package
- Patent number 9,640,469
- Issue date May 2, 2017
- NXP USA, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin low profile strip dual in-line memory module
- Patent number 9,480,161
- Issue date Oct 25, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Perry H. Pelley
- G11 - INFORMATION STORAGE
Information Patent Grant
Wirebond recess for stacked die
- Patent number 9,318,451
- Issue date Apr 19, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package encapsulant relief feature
- Patent number 9,281,256
- Issue date Mar 8, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Min Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Matrix lid heatspreader for flip chip package
- Patent number 9,159,643
- Issue date Oct 13, 2015
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge coupling of semiconductor dies
- Patent number 9,087,702
- Issue date Jul 21, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heat conductive substrate for integrated circuit package
- Patent number 9,070,657
- Issue date Jun 30, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and structures for reducing stress on die assembly
- Patent number 8,970,026
- Issue date Mar 3, 2015
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using an integrated circuit die configuration for package height re...
- Patent number 8,957,510
- Issue date Feb 17, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fluid cooled semiconductor die package
- Patent number 8,860,212
- Issue date Oct 14, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Chee Seng Foong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic pad size to reduce solder fatigue
- Patent number 8,008,786
- Issue date Aug 30, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Dynamic pad size to reduce solder fatigue
- Patent number 7,772,104
- Issue date Aug 10, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for processing multiple semiconductor devices for test
- Patent number 6,905,891
- Issue date Jun 14, 2005
- Frrescale Semiconductor, Inc.
- Gary J. Kovar
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
DIE STACK ADDRESS BUS HAVING A PROGRAMMABLE WIDTH
- Publication number 20160118095
- Publication date Apr 28, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Perry H. Pelley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Matrix Lid Heatspreader for Flip Chip Package
- Publication number 20160005682
- Publication date Jan 7, 2016
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEFECTIVE DIE REPLACEMENT IN A DIE STACK
- Publication number 20150287653
- Publication date Oct 8, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Perry H. Pelley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thin Low Profile Strip Dual In-Line Memory Module
- Publication number 20150208510
- Publication date Jul 23, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Perry H. Pelley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
WIREBOND RECESS FOR STACKED DIE
- Publication number 20150115474
- Publication date Apr 30, 2015
- TIM V. PHAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HEAT CONDUCTIVE SUBSTRATE FOR INTEGRATED CIRCUIT PACKAGE
- Publication number 20150097280
- Publication date Apr 9, 2015
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ENCAPSULANT RELIEF FEATURE
- Publication number 20150084168
- Publication date Mar 26, 2015
- MIN DING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED SEMICONDUCTOR DIE STACK
- Publication number 20150069624
- Publication date Mar 12, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE COUPLING OF SEMICONDUCTOR DIES
- Publication number 20150061097
- Publication date Mar 5, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USING AN INTEGRATED CIRCUIT DIE CONFIGURATION FOR PACKAGE HEIGHT RE...
- Publication number 20150008567
- Publication date Jan 8, 2015
- TIM V. PHAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLUID COOLED SEMICONDUCTOR DIE PACKAGE
- Publication number 20140306336
- Publication date Oct 16, 2014
- Chee Seng Foong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND STRUCTURES FOR REDUCING STRESS ON DIE ASSEMBLY
- Publication number 20140225268
- Publication date Aug 14, 2014
- GEORGE R. LEAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Matrix Lid Heatspreader for Flip Chip Package
- Publication number 20140077352
- Publication date Mar 20, 2014
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC PAD SIZE TO REDUCE SOLDER FATIGUE
- Publication number 20100264542
- Publication date Oct 21, 2010
- Freescale Semiconductor Inc.
- Tim V. Pham
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Dynamic pad size to reduce solder fatigue
- Publication number 20080185735
- Publication date Aug 7, 2008
- Freescale Semiconductor, Inc.
- Tim V. Pham
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method for processing multiple semiconductor devices for test
- Publication number 20030160315
- Publication date Aug 28, 2003
- Gary J. Kovar
- G01 - MEASURING TESTING

Tim V. Pham

Person

Patents Grantslast 30 patents

Defective die replacement in a die stack

Die stack address bus having a programmable width

Matrix lid heatspreader for flip chip package

Thin low profile strip dual in-line memory module

Wirebond recess for stacked die

Package encapsulant relief feature

Matrix lid heatspreader for flip chip package

Edge coupling of semiconductor dies

Heat conductive substrate for integrated circuit package

Methods and structures for reducing stress on die assembly

Using an integrated circuit die configuration for package height re...

Fluid cooled semiconductor die package

Dynamic pad size to reduce solder fatigue

Dynamic pad size to reduce solder fatigue

Method for processing multiple semiconductor devices for test

Patents Applicationslast 30 patents

DIE STACK ADDRESS BUS HAVING A PROGRAMMABLE WIDTH

Matrix Lid Heatspreader for Flip Chip Package

DEFECTIVE DIE REPLACEMENT IN A DIE STACK

Thin Low Profile Strip Dual In-Line Memory Module

WIREBOND RECESS FOR STACKED DIE

HEAT CONDUCTIVE SUBSTRATE FOR INTEGRATED CIRCUIT PACKAGE

PACKAGE ENCAPSULANT RELIEF FEATURE

RECESSED SEMICONDUCTOR DIE STACK

EDGE COUPLING OF SEMICONDUCTOR DIES

USING AN INTEGRATED CIRCUIT DIE CONFIGURATION FOR PACKAGE HEIGHT RE...

FLUID COOLED SEMICONDUCTOR DIE PACKAGE

METHODS AND STRUCTURES FOR REDUCING STRESS ON DIE ASSEMBLY

Matrix Lid Heatspreader for Flip Chip Package

DYNAMIC PAD SIZE TO REDUCE SOLDER FATIGUE

Dynamic pad size to reduce solder fatigue

Method for processing multiple semiconductor devices for test