Timothy Anderson

Person

University Park, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method to control the number of active vector lanes in a...
- Patent number 11,977,887
- Issue date May 7, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nested loop control
- Patent number 11,972,236
- Issue date Apr 30, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conditional execution specification of instructions using condition...
- Patent number 11,960,892
- Issue date Apr 16, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing fundamental computational primitives using a matrix mu...
- Patent number 11,960,567
- Issue date Apr 16, 2024
- Texas Instruments Incorporated
- Arthur John Redfern
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce read-modify-write cycles for non-al...
- Patent number 11,940,929
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory pipeline control in a hierarchical memory system
- Patent number 11,940,918
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 11,940,930
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write streaming with cache write acknowledgment in a processor
- Patent number 11,921,637
- Issue date Mar 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector SIMD VLIW data path architecture
- Patent number 11,922,166
- Issue date Mar 5, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dual multiplication units in a data path
- Patent number 11,921,643
- Issue date Mar 5, 2024
- Texas Instruments Incorporated
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller with caching and non-caching modes
- Patent number 11,907,753
- Issue date Feb 20, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inserting predefined pad values into a stream of vectors
- Patent number 11,907,721
- Issue date Feb 20, 2024
- Texas Instruments Incorporated
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector reverse
- Patent number 11,900,112
- Issue date Feb 13, 2024
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to queue multiple streams to run on streaming engine
- Patent number 11,900,117
- Issue date Feb 13, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 11,886,353
- Issue date Jan 30, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 11,868,272
- Issue date Jan 9, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software-hardware memory management modes
- Patent number 11,853,225
- Issue date Dec 26, 2023
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for addressing data in memory
- Patent number 11,836,494
- Issue date Dec 5, 2023
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for vector sorting using vector permutation logic
- Patent number 11,829,300
- Issue date Nov 28, 2023
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delayed snoop for improved multi-process false sharing parallel thr...
- Patent number 11,822,786
- Issue date Nov 21, 2023
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nested loop control
- Patent number 11,816,485
- Issue date Nov 14, 2023
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Butterfly network on load data return
- Patent number 11,804,858
- Issue date Oct 31, 2023
- Texas Instruments Incorporated
- Dheera Balasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 11,803,486
- Issue date Oct 31, 2023
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore bus architecture with wire reduction and physical congest...
- Patent number 11,803,505
- Issue date Oct 31, 2023
- Texas Instruments Incorporated
- David M. Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline protection for CPUs with save and restore of intermediate...
- Patent number 11,789,742
- Issue date Oct 17, 2023
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implied fence on stream open
- Patent number 11,782,718
- Issue date Oct 10, 2023
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate atomic compare and swap in cach...
- Patent number 11,775,446
- Issue date Oct 3, 2023
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device with vector transformation execution
- Patent number 11,768,685
- Issue date Sep 26, 2023
- Texas Instruments Incorporated
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different tags
- Patent number 11,762,780
- Issue date Sep 19, 2023
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector load and duplicate operations
- Patent number 11,755,322
- Issue date Sep 12, 2023
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLER WITH CACHING AND NON-CACHING MODES
- Publication number 20240152385
- Publication date May 9, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES
- Publication number 20240126703
- Publication date Apr 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ADDRESSING DATA IN MEMORY
- Publication number 20240103863
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240095164
- Publication date Mar 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...
- Publication number 20240086065
- Publication date Mar 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NESTED LOOP CONTROL
- Publication number 20240086193
- Publication date Mar 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS
- Publication number 20240078190
- Publication date Mar 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUTTERFLY NETWORK ON LOAD DATA RETURN
- Publication number 20240063827
- Publication date Feb 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Dheera Balasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Vector Sorting using Vector Permutation Logic
- Publication number 20240045810
- Publication date Feb 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO PADDING FOR CONVOLUTIONAL NEURAL NETWORKS
- Publication number 20240045922
- Publication date Feb 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH COMMAND REORDERING
- Publication number 20240036736
- Publication date Feb 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLIED FENCE ON STREAM OPEN
- Publication number 20240036867
- Publication date Feb 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE PROTECTION FOR CPUS WITH SAVE AND RESTORE OF INTERMEDIATE...
- Publication number 20240036876
- Publication date Feb 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE INSTRUCTION SET ARCHITECTURES ON A PROCESSING DEVICE
- Publication number 20240036866
- Publication date Feb 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Duc Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSIENT CURRENT MANAGEMENT
- Publication number 20240037180
- Publication date Feb 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Donald E. STEISS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20240028523
- Publication date Jan 25, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20240020242
- Publication date Jan 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DEVICE WITH VECTOR TRANSFORMATION EXECUTION
- Publication number 20240004663
- Publication date Jan 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT TAGS
- Publication number 20240004800
- Publication date Jan 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20230418469
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR LOAD AND DUPLICATE OPERATIONS
- Publication number 20230418605
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20230401162
- Publication date Dec 14, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR MAXIMUM AND MINIMUM WITH INDEXING
- Publication number 20230367598
- Publication date Nov 16, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Duc BUI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH EARLY AND LATE ADDRESS AND LOOP COUNT REGISTE...
- Publication number 20230367717
- Publication date Nov 16, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUICK CLEARING OF REGISTERS
- Publication number 20230359385
- Publication date Nov 9, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Dual Issue Multiply Instructions
- Publication number 20230350813
- Publication date Nov 2, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INTERRUPTING AND RESUMING EXECUTION ON AN UNPROTECTED...
- Publication number 20230350681
- Publication date Nov 2, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20230342305
- Publication date Oct 26, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

Timothy Anderson

Person

Patents Grantslast 30 patents

System and method to control the number of active vector lanes in a...

Nested loop control

Conditional execution specification of instructions using condition...

Implementing fundamental computational primitives using a matrix mu...

Methods and apparatus to reduce read-modify-write cycles for non-al...

Memory pipeline control in a hierarchical memory system

Methods and apparatus to facilitate atomic operations in victim cache

Write streaming with cache write acknowledgment in a processor

Vector SIMD VLIW data path architecture

Method and apparatus for dual multiplication units in a data path

Controller with caching and non-caching modes

Inserting predefined pad values into a stream of vectors

Vector reverse

Mechanism to queue multiple streams to run on streaming engine

Hybrid victim cache and write miss buffer with fence operation

Methods and apparatus for allocation in a victim cache system

Software-hardware memory management modes

System and method for addressing data in memory

Method and apparatus for vector sorting using vector permutation logic

Delayed snoop for improved multi-process false sharing parallel thr...

Nested loop control

Butterfly network on load data return

Write merging on stores with different privilege levels

Multicore bus architecture with wire reduction and physical congest...

Pipeline protection for CPUs with save and restore of intermediate...

Implied fence on stream open

Methods and apparatus to facilitate atomic compare and swap in cach...

Processing device with vector transformation execution

Write merging on stores with different tags

Vector load and duplicate operations

Patents Applicationslast 30 patents

CONTROLLER WITH CACHING AND NON-CACHING MODES

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES

SYSTEM AND METHOD FOR ADDRESSING DATA IN MEMORY

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...

NESTED LOOP CONTROL

WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS

BUTTERFLY NETWORK ON LOAD DATA RETURN

Method and Apparatus for Vector Sorting using Vector Permutation Logic

ZERO PADDING FOR CONVOLUTIONAL NEURAL NETWORKS

MEMORY CONTROLLER WITH COMMAND REORDERING

IMPLIED FENCE ON STREAM OPEN

PIPELINE PROTECTION FOR CPUS WITH SAVE AND RESTORE OF INTERMEDIATE...

MULTIPLE INSTRUCTION SET ARCHITECTURES ON A PROCESSING DEVICE

TRANSIENT CURRENT MANAGEMENT

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

PROCESSING DEVICE WITH VECTOR TRANSFORMATION EXECUTION

WRITE MERGING ON STORES WITH DIFFERENT TAGS

MULTICORE SHARED CACHE OPERATION ENGINE

VECTOR LOAD AND DUPLICATE OPERATIONS

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

VECTOR MAXIMUM AND MINIMUM WITH INDEXING

STREAMING ENGINE WITH EARLY AND LATE ADDRESS AND LOOP COUNT REGISTE...

QUICK CLEARING OF REGISTERS

Method and Apparatus for Dual Issue Multiply Instructions

MECHANISM FOR INTERRUPTING AND RESUMING EXECUTION ON AN UNPROTECTED...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES