Timothy Charles Mace

Person

Haverhill, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Communication using integrated circuit interconnect circuitry
- Patent number 9,288,258
- Issue date Mar 15, 2016
- ARM Limited
- Timothy Charles Mace
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data processing apparatus and a method for setting priority levels...
- Patent number 9,201,816
- Issue date Dec 1, 2015
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling latency and power consumption in a memory
- Patent number 9,087,017
- Issue date Jul 21, 2015
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write transaction management within a memory interconnect
- Patent number 9,015,424
- Issue date Apr 21, 2015
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security controller
- Patent number 8,549,633
- Issue date Oct 1, 2013
- ARM Limited
- Lim Seow Chuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and a method for setting priority levels...
- Patent number 8,549,199
- Issue date Oct 1, 2013
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic resource allocation for transaction requests issued by init...
- Patent number 8,463,958
- Issue date Jun 11, 2013
- ARM Limited
- Phanindra Kumar Mannava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for controlling issuing of transaction requests
- Patent number 8,307,138
- Issue date Nov 6, 2012
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and method for measuring a value of a pre...
- Patent number 8,260,991
- Issue date Sep 4, 2012
- ARM Limited
- Alistair Crone Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiency of cache memory operations
- Patent number 8,001,331
- Issue date Aug 16, 2011
- ARM Limited
- Stuart David Biles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulating multiple bus used within a data processing system
- Patent number 7,856,346
- Issue date Dec 21, 2010
- ARM Limited
- Andrew Mark Nightingale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and method for arbitrating between messag...
- Patent number 7,769,936
- Issue date Aug 3, 2010
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of transmitting and receiving data, system and receiver ther...
- Patent number 6,522,698
- Issue date Feb 18, 2003
- Clive Russell Irving
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
WRITE TRANSACTION MANAGEMENT WITHIN A MEMORY INTERCONNECT
- Publication number 20140052933
- Publication date Feb 20, 2014
- ARM Limited
- Timothy Charles MACE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING APPARATUS AND A METHOD FOR SETTING PRIORITY LEVELS...
- Publication number 20140047148
- Publication date Feb 13, 2014
- ARM Limited
- Timothy Charles MACE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATION USING INTEGRATED CIRCUIT INTERCONNECT CIRCUITRY
- Publication number 20130219004
- Publication date Aug 22, 2013
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic resource allocation for transaction requests issued by init...
- Publication number 20130042032
- Publication date Feb 14, 2013
- ARM Limited
- Phanindra Kumar Mannava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Security controller
- Publication number 20130036465
- Publication date Feb 7, 2013
- Lim Seow Chuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling latency and power consumption in a memory
- Publication number 20120210055
- Publication date Aug 16, 2012
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for controlling issuing of transaction requests
- Publication number 20120011291
- Publication date Jan 12, 2012
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processing apparatus and a method for setting priority levels...
- Publication number 20110072178
- Publication date Mar 24, 2011
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processing apparatus and method for measuring a value of a pre...
- Publication number 20110066780
- Publication date Mar 17, 2011
- Alistair Crone Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficiency of cache memory operations
- Publication number 20090265514
- Publication date Oct 22, 2009
- ARM Limited
- Stuart David Biles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processing apparatus and method for arbitrating between messag...
- Publication number 20080235423
- Publication date Sep 25, 2008
- ARM Limited
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Emulating multiple bus used within a data processing system
- Publication number 20030212968
- Publication date Nov 13, 2003
- Andrew Mark Nightingale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modified clock signal generator
- Publication number 20020047739
- Publication date Apr 25, 2002
- Timothy Charles Mace
- G06 - COMPUTING CALCULATING COUNTING

Timothy Charles Mace

Person

Patents Grantslast 30 patents

Communication using integrated circuit interconnect circuitry

Data processing apparatus and a method for setting priority levels...

Controlling latency and power consumption in a memory

Write transaction management within a memory interconnect

Security controller

Data processing apparatus and a method for setting priority levels...

Dynamic resource allocation for transaction requests issued by init...

Apparatus and method for controlling issuing of transaction requests

Data processing apparatus and method for measuring a value of a pre...

Efficiency of cache memory operations

Emulating multiple bus used within a data processing system

Data processing apparatus and method for arbitrating between messag...

Method of transmitting and receiving data, system and receiver ther...

Patents Applicationslast 30 patents

WRITE TRANSACTION MANAGEMENT WITHIN A MEMORY INTERCONNECT

DATA PROCESSING APPARATUS AND A METHOD FOR SETTING PRIORITY LEVELS...

COMMUNICATION USING INTEGRATED CIRCUIT INTERCONNECT CIRCUITRY

Dynamic resource allocation for transaction requests issued by init...

Security controller

Controlling latency and power consumption in a memory

Apparatus and method for controlling issuing of transaction requests

Data processing apparatus and a method for setting priority levels...

Data processing apparatus and method for measuring a value of a pre...

Efficiency of cache memory operations

Data processing apparatus and method for arbitrating between messag...

Emulating multiple bus used within a data processing system

Modified clock signal generator