Tin Tin WEE

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Layout technique for middle-end-of-line
- Patent number 10,410,965
- Issue date Sep 10, 2019
- QUALCOMM Incorporated
- Tin Tin Wee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layout technique for middle-end-of-line
- Patent number 10,325,845
- Issue date Jun 18, 2019
- QUALCOMM Incorporated
- Tin Tin Wee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for wafer-level loopback test
- Patent number 10,114,074
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Grant
Delay line for one shot pre-emphasis
- Patent number 10,044,342
- Issue date Aug 7, 2018
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Termination schemes for multi-rank memory bus architectures
- Patent number 9,984,011
- Issue date May 29, 2018
- QUALCOMM Incorporated
- Tin Tin Wee
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for wafer-level loopback test
- Patent number 9,977,078
- Issue date May 22, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Grant
Programmable pad capacitance for supporting bidirectional signaling...
- Patent number 9,767,889
- Issue date Sep 19, 2017
- QUALCOMM Incorporated
- Scott Powers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for clock distribution in a die-to-die interface
- Patent number 9,654,090
- Issue date May 16, 2017
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits and methods providing high-speed data link with equalizer
- Patent number 9,614,703
- Issue date Apr 4, 2017
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for clock distribution in a die-to-die interface
- Patent number 9,350,339
- Issue date May 24, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for transition-minimized data bus inversion
- Patent number 9,244,875
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for providing data channels at a die-to-die int...
- Patent number 9,245,870
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shield-modulated tunable inductor device
- Patent number 8,466,536
- Issue date Jun 18, 2013
- Advanced Micro Devices, Inc.
- Alvin Leng Sun Loke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for biasing a metal-oxide-semiconductor capaci...
- Patent number 7,280,002
- Issue date Oct 9, 2007
- Avago Technologies General IP Pte. Ltd.
- Alvin Leng Sun Loke
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE
- Publication number 20190385948
- Publication date Dec 19, 2019
- QUALCOMM Incorporated
- Tin Tin Wee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CO-PLACEMENT OF RESISTOR AND OTHER DEVICES TO IMPROVE AREA & PERFOR...
- Publication number 20190304905
- Publication date Oct 3, 2019
- QUALCOMM Incorporated
- Tin Tin WEE
- G05 - CONTROLLING REGULATING
Information Patent Application
LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE
- Publication number 20190067189
- Publication date Feb 28, 2019
- QUALCOMM Incorporated
- Tin Tin Wee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE
- Publication number 20180374792
- Publication date Dec 27, 2018
- QUALCOMM Incorporated
- Tin Tin Wee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST
- Publication number 20180231608
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Application
DELAY LINE FOR ONE SHOT PRE-EMPHASIS
- Publication number 20170359053
- Publication date Dec 14, 2017
- QUALCOMM Incorporated
- LuVerne Ray Peterson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TERMINATION SCHEMES FOR MULTI-RANK MEMORY BUS ARCHITECTURES
- Publication number 20170351625
- Publication date Dec 7, 2017
- QUALCOMM Incorporated
- Tin Tin Wee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits and Methods Providing High-Speed Data Link with Equalizer
- Publication number 20170134191
- Publication date May 11, 2017
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE
- Publication number 20160308519
- Publication date Oct 20, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITS AND METHODS PROVIDING HIGH-SPEED DATA LINK WITH EQUALIZER
- Publication number 20160294585
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Mohammed Mizanur Rahman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST
- Publication number 20160025807
- Publication date Jan 28, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE
- Publication number 20160020759
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Thomas Clark Bryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR TRANSITION-MINIMIZED DATA BUS INVERSION
- Publication number 20160019179
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Alvin Leng Sun Loke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-DENSITY STACKED PLANAR METAL-INSULATOR-METAL CAPACITOR STRUCTU...
- Publication number 20140159200
- Publication date Jun 12, 2014
- Alvin Leng Sun Loke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHIELD-MODULATED TUNABLE INDUCTOR DEVICE
- Publication number 20120091558
- Publication date Apr 19, 2012
- Advanced Micro Devices, Inc.
- Alvin Leng Sun LOKE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Voltage reference circuit operable with a low voltage supply and me...
- Publication number 20110133719
- Publication date Jun 9, 2011
- Advance Micro Devices, Inc.
- Alvin Leng Sun Loke
- G05 - CONTROLLING REGULATING
Information Patent Application
PSEUDO BANDGAP VOLTAGE REFERENCE CIRCUIT
- Publication number 20100171547
- Publication date Jul 8, 2010
- Emerson S. Fang
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and apparatus for biasing a metal-oxide-semiconductor capaci...
- Publication number 20060197623
- Publication date Sep 7, 2006
- Alvin Leng Sun Loke
- H03 - BASIC ELECTRONIC CIRCUITRY

Tin Tin WEE

Person

Patents Grantslast 30 patents

Layout technique for middle-end-of-line

Layout technique for middle-end-of-line

Systems and methods for wafer-level loopback test

Delay line for one shot pre-emphasis

Termination schemes for multi-rank memory bus architectures

Systems and methods for wafer-level loopback test

Programmable pad capacitance for supporting bidirectional signaling...

Systems and methods for clock distribution in a die-to-die interface

Circuits and methods providing high-speed data link with equalizer

Systems and methods for clock distribution in a die-to-die interface

Systems and methods for transition-minimized data bus inversion

Systems and methods for providing data channels at a die-to-die int...

Shield-modulated tunable inductor device

Method and apparatus for biasing a metal-oxide-semiconductor capaci...

Patents Applicationslast 30 patents

LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE

CO-PLACEMENT OF RESISTOR AND OTHER DEVICES TO IMPROVE AREA & PERFOR...

LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE

LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE

SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

DELAY LINE FOR ONE SHOT PRE-EMPHASIS

TERMINATION SCHEMES FOR MULTI-RANK MEMORY BUS ARCHITECTURES

Circuits and Methods Providing High-Speed Data Link with Equalizer

SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE

CIRCUITS AND METHODS PROVIDING HIGH-SPEED DATA LINK WITH EQUALIZER

SYSTEMS AND METHODS FOR WAFER-LEVEL LOOPBACK TEST

SYSTEMS AND METHODS FOR CLOCK DISTRIBUTION IN A DIE-TO-DIE INTERFACE

SYSTEMS AND METHODS FOR TRANSITION-MINIMIZED DATA BUS INVERSION

HIGH-DENSITY STACKED PLANAR METAL-INSULATOR-METAL CAPACITOR STRUCTU...

SHIELD-MODULATED TUNABLE INDUCTOR DEVICE

Voltage reference circuit operable with a low voltage supply and me...

PSEUDO BANDGAP VOLTAGE REFERENCE CIRCUIT

Method and apparatus for biasing a metal-oxide-semiconductor capaci...