Tina C. Zhong

Person

Gilbert, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,630,691
- Issue date Apr 18, 2023
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,106,494
- Issue date Aug 31, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External resource discovery and coordination in a data center
- Patent number 10,929,330
- Issue date Feb 23, 2021
- Intel Corporation
- Chih-Cheh Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to coordinate system boot and reset flows and improve reliab...
- Patent number 10,620,966
- Issue date Apr 14, 2020
- Intel Corporation
- Tina C. Zhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Micro-architectural techniques to minimize companion die firmware l...
- Patent number 10,496,565
- Issue date Dec 3, 2019
- Intel Corporation
- Anand K. Enamandram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die logic analyzer for semiconductor die
- Patent number 8,799,728
- Issue date Aug 5, 2014
- Intel Corporation
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Grant
On-die logic analyzer for semiconductor die
- Patent number 8,589,745
- Issue date Nov 19, 2013
- Intel Corporation
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Grant
On-die logic analyzer for semiconductor die
- Patent number 8,543,776
- Issue date Sep 24, 2013
- Intel Corporation
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Grant
On-die logic analyzer for semiconductor die
- Patent number 8,327,198
- Issue date Dec 4, 2012
- Intel Corporation
- Tina C. Zhong
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20210389984
- Publication date Dec 16, 2021
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20200104164
- Publication date Apr 2, 2020
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO COORDINATE SYSTEM BOOT AND RESET FLOWS AND IMPROVE RELIAB...
- Publication number 20190095224
- Publication date Mar 28, 2019
- Intel Corporation
- Tina C. Zhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICRO-ARCHITECTURAL TECHNIQUES TO MINIMIZE COMPANION DIE FIRMWARE L...
- Publication number 20190042514
- Publication date Feb 7, 2019
- Intel Corporation
- Anand K. ENAMANDRAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
External Resource Discovery and Coordination in a Data Center
- Publication number 20190004989
- Publication date Jan 3, 2019
- Intel Corporation
- Chih-Cheh Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DIE LOGIC ANALYZER FOR SEMICONDUCTOR DIE
- Publication number 20140053026
- Publication date Feb 20, 2014
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Application
On-Die Logic Analyzer For Semiconductor Die
- Publication number 20130103987
- Publication date Apr 25, 2013
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Application
On-Die Logic Analyzer For Semiconductor Die
- Publication number 20130054931
- Publication date Feb 28, 2013
- Tina C. Zhong
- G01 - MEASURING TESTING
Information Patent Application
On-Die Logic Analyzer For Semiconductor Die
- Publication number 20110041017
- Publication date Feb 17, 2011
- Tina C. Zhong
- G06 - COMPUTING CALCULATING COUNTING

Tina C. Zhong

Person

Patents Grantslast 30 patents

Memory system architecture for multi-threaded processors

Memory system architecture for multi-threaded processors

External resource discovery and coordination in a data center

Method to coordinate system boot and reset flows and improve reliab...

Micro-architectural techniques to minimize companion die firmware l...

On-die logic analyzer for semiconductor die

On-die logic analyzer for semiconductor die

On-die logic analyzer for semiconductor die

On-die logic analyzer for semiconductor die

Patents Applicationslast 30 patents

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

METHOD TO COORDINATE SYSTEM BOOT AND RESET FLOWS AND IMPROVE RELIAB...

MICRO-ARCHITECTURAL TECHNIQUES TO MINIMIZE COMPANION DIE FIRMWARE L...

External Resource Discovery and Coordination in a Data Center

ON-DIE LOGIC ANALYZER FOR SEMICONDUCTOR DIE

On-Die Logic Analyzer For Semiconductor Die

On-Die Logic Analyzer For Semiconductor Die

On-Die Logic Analyzer For Semiconductor Die