Tina J. Wagner

Person

Newburgh, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Via selection in integrated circuit design
- Patent number 8,631,375
- Issue date Jan 14, 2014
- International Business Machines Corporation
- Robert R. Arelt
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Automated sensitivity definition and calibration for design for man...
- Patent number 8,141,027
- Issue date Mar 20, 2012
- International Business Machines Corporation
- James A. Culp
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Intersect area based ground rule for semiconductor design
- Patent number 7,941,780
- Issue date May 10, 2011
- International Business Machines Corporation
- Albrik Avanessian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Raised source drain mosfet with amorphous notched gate cap layer wi...
- Patent number 7,700,425
- Issue date Apr 20, 2010
- International Business Machines Corporation
- Tina J. Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methodology for layout-based modulation and optimization of nitride...
- Patent number 7,337,420
- Issue date Feb 26, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming an electronic device on a recess in the surface o...
- Patent number 6,930,030
- Issue date Aug 16, 2005
- International Business Machines Corporation
- Werner A. Rausch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-anneal of CoSi, to prevent formation of amorphous layer between...
- Patent number 6,878,624
- Issue date Apr 12, 2005
- International Business Machines Corporation
- John Bruley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hard mask integrated etch process for patterning of silicon oxide a...
- Patent number 6,869,542
- Issue date Mar 22, 2005
- International Business Machines Corporation
- Sadanand V. Desphande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for formation of a blocked silicide resistor
- Patent number 6,660,664
- Issue date Dec 9, 2003
- International Business Machines Corp.
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a TiN layer on top of a metal silicide layer in...
- Patent number 6,436,823
- Issue date Aug 20, 2002
- International Business Machines Corporation
- Cyril Cabral
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conversion of amorphous layer produced during IMP Ti deposition
- Patent number 6,387,790
- Issue date May 14, 2002
- International Business Machines Corporation
- Anthony Gene Domenicucci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hard mask process to prevent surface roughness for selective dielec...
- Patent number 6,345,399
- Issue date Feb 12, 2002
- International Business Machines Corporation
- Paul C. Jamison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of contact structure formation
- Patent number 6,121,129
- Issue date Sep 19, 2000
- International Business Machines Corporation
- Nancy Anne Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a semiconductor structure having a self-ali...
- Patent number 6,090,722
- Issue date Jul 18, 2000
- International Business Machines Corporation
- Michael Armacost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of etching an oxide layer
- Patent number 5,811,357
- Issue date Sep 22, 1998
- International Business Machines Corporation
- Michael D. Armacost
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VIA SELECTION IN INTEGRATED CIRCUIT DESIGN
- Publication number 20130268908
- Publication date Oct 10, 2013
- International Business Machines Corporation
- Robert R. Arelt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED SENSITIVITY DEFINITION AND CALIBRATION FOR DESIGN FOR MAN...
- Publication number 20110166686
- Publication date Jul 7, 2011
- International Business Machines Corporation
- James A. Culp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERSECT AREA BASED GROUND RULE FOR SEMICONDUCTOR DESIGN
- Publication number 20090265673
- Publication date Oct 22, 2009
- International Business Machines Corporation
- Albrik Avanessian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of manufacture of raised source drain MOSFET with top notche...
- Publication number 20070037356
- Publication date Feb 15, 2007
- Tina J. Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methodology for layout-based modulation and optimization of nitride...
- Publication number 20070028195
- Publication date Feb 1, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-ANNEAL OF COSI, TO PREVENT FORMATION OF AMORPHOUS LAYER BETWEEN...
- Publication number 20050070098
- Publication date Mar 31, 2005
- International Business Machines Corporation
- John Bruley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURE OF RAISED SOURCE DRAIN MOSFET WITH TOP NOTCHE...
- Publication number 20050054169
- Publication date Mar 10, 2005
- International Business Machines Corporation
- Tina J. Wagner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming precision recessed gate structure
- Publication number 20040248348
- Publication date Dec 9, 2004
- Werner A. Rausch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARD MASK INTEGRATED ETCH PROCESS FOR PATTERNING OF SILICON OXIDE A...
- Publication number 20040178169
- Publication date Sep 16, 2004
- International Business Machines Corporation
- Sadanand V. Desphande
- H01 - BASIC ELECTRIC ELEMENTS

Tina J. Wagner

Person

Patents Grantslast 30 patents

Via selection in integrated circuit design

Automated sensitivity definition and calibration for design for man...

Intersect area based ground rule for semiconductor design

Raised source drain mosfet with amorphous notched gate cap layer wi...

Methodology for layout-based modulation and optimization of nitride...

Method of forming an electronic device on a recess in the surface o...

Pre-anneal of CoSi, to prevent formation of amorphous layer between...

Hard mask integrated etch process for patterning of silicon oxide a...

Structure and method for formation of a blocked silicide resistor

Method for forming a TiN layer on top of a metal silicide layer in...

Conversion of amorphous layer produced during IMP Ti deposition

Hard mask process to prevent surface roughness for selective dielec...

Method of contact structure formation

Process for fabricating a semiconductor structure having a self-ali...

Process of etching an oxide layer

Patents Applicationslast 30 patents

VIA SELECTION IN INTEGRATED CIRCUIT DESIGN

AUTOMATED SENSITIVITY DEFINITION AND CALIBRATION FOR DESIGN FOR MAN...

INTERSECT AREA BASED GROUND RULE FOR SEMICONDUCTOR DESIGN

Method of manufacture of raised source drain MOSFET with top notche...

Methodology for layout-based modulation and optimization of nitride...

PRE-ANNEAL OF COSI, TO PREVENT FORMATION OF AMORPHOUS LAYER BETWEEN...

METHOD OF MANUFACTURE OF RAISED SOURCE DRAIN MOSFET WITH TOP NOTCHE...

Method of forming precision recessed gate structure

HARD MASK INTEGRATED ETCH PROCESS FOR PATTERNING OF SILICON OXIDE A...