Membership
Tour
Register
Log in
Ting Yew
Follow
Person
San Jose, CA, US
People
Overview
Industries
Organizations
People
Information
Impact
Patents Grants
last 30 patents
Information
Patent Grant
Multiple mode device implementation for programmable logic devices
Patent number
10,630,269
Issue date
Apr 21, 2020
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Flexible ripple mode device implementation for programmable logic d...
Patent number
10,382,021
Issue date
Aug 13, 2019
LATTICE SEMICONDUCTOR CORPORATION
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Multiple mode device implementation for programmable logic devices
Patent number
10,141,917
Issue date
Nov 27, 2018
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Selective power gating of routing resource configuration memory bit...
Patent number
10,079,054
Issue date
Sep 18, 2018
LATTICE SEMICONDUCTOR CORPORATION
Senani Gunaratna
G11 - INFORMATION STORAGE
Information
Patent Grant
Flexible ripple mode device implementation for programmable logic d...
Patent number
9,735,761
Issue date
Aug 15, 2017
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Multiple mode device implementation for programmable logic devices
Patent number
9,716,491
Issue date
Jul 25, 2017
LATTICE SEMICONDUCTOR CORPORATION
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
High speed complementary NMOS LUT logic
Patent number
9,543,950
Issue date
Jan 10, 2017
LATTICE SEMICONDUCTOR CORPORATION
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Shared logic for multiple registers with asynchronous initialization
Patent number
9,252,755
Issue date
Feb 2, 2016
LATTICE SEMICONDUCTOR CORPORATION
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Testing of soft error detection logic for programmable logic devices
Patent number
8,370,691
Issue date
Feb 5, 2013
Lattice Semiconductor Corporation
Chan-Chi Jason Cheng
G11 - INFORMATION STORAGE
Information
Patent Grant
Soft error detection logic testing systems and methods
Patent number
8,065,574
Issue date
Nov 22, 2011
Lattice Semiconductor Corporation
Chan-Chi Jason Cheng
G11 - INFORMATION STORAGE
Information
Patent Grant
High fan-out signal routing systems and methods
Patent number
7,576,563
Issue date
Aug 18, 2009
Lattice Semiconductor Corporation
Qin Wei
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Self-verification of configuration memory in programmable logic dev...
Patent number
7,401,280
Issue date
Jul 15, 2008
Lattice Semiconductor Corporation
Satwant Singh
G11 - INFORMATION STORAGE
Information
Patent Grant
Self-verification of configuration memory in programmable logic dev...
Patent number
7,257,750
Issue date
Aug 14, 2007
Lattice Semiconductor Corporation
Satwant Singh
G11 - INFORMATION STORAGE
Patents Applications
last 30 patents
Information
Patent Application
MULTIPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES
Publication number
20190158073
Publication date
May 23, 2019
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MULTIPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES
Publication number
20170324401
Publication date
Nov 9, 2017
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
FLEXIBLE RIPPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC D...
Publication number
20170324400
Publication date
Nov 9, 2017
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
FLEXIBLE RIPPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC D...
Publication number
20160028400
Publication date
Jan 28, 2016
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
SHARED LOGIC FOR MULTIPLE REGISTERS WITH ASYNCHRONOUS INITIALIZATION
Publication number
20160028383
Publication date
Jan 28, 2016
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
MULTIPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES
Publication number
20160028401
Publication date
Jan 28, 2016
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH SPEED COMPLEMENTARY NMOS LUT LOGIC
Publication number
20160020767
Publication date
Jan 21, 2016
Lattice Semiconductor Corporation
Brad Sharpe-Geisler
H03 - BASIC ELECTRONIC CIRCUITRY