Todd A. Christensen

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory interface latch with integrated write-through and fence func...
- Patent number 10,916,323
- Issue date Feb 9, 2021
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface latch with integrated write-through and fence func...
- Patent number 10,381,098
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip diagnostic circuitry monitoring multiple cycles of signal s...
- Patent number 10,311,966
- Issue date Jun 4, 2019
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Memory interface latch with integrated write-through function
- Patent number 10,229,748
- Issue date Mar 12, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing eFuse visual security of stored data using EDRAM
- Patent number 10,121,530
- Issue date Nov 6, 2018
- International Business Machines Corporation
- Todd A. Christensen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhancing performance of one or more slower partitions of an integr...
- Patent number 10,061,368
- Issue date Aug 28, 2018
- International Business Machines Corporation
- Todd A. Christensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated shielding and decoupling capacitor structure
- Patent number 9,991,199
- Issue date Jun 5, 2018
- International Business Machines Corporation
- Todd A. Christensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Detecting maximum voltage between multiple power supplies for memor...
- Patent number 9,715,905
- Issue date Jul 25, 2017
- International Business Machines Corporation
- Anthony G. Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing eFuse visual security of stored data using EDRAM
- Patent number 9,646,712
- Issue date May 9, 2017
- International Business Machines Corporation
- Todd A. Christensen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge protection device with power management
- Patent number 9,583,938
- Issue date Feb 28, 2017
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
FinFET power supply decoupling
- Patent number 9,570,388
- Issue date Feb 14, 2017
- International Business Machines Corporation
- Todd A. Christensen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementing eFuse visual security of stored data using EDRAM
- Patent number 9,514,841
- Issue date Dec 6, 2016
- International Business Machines Corporation
- Todd A. Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
High-density integrated circuit via capacitor
- Patent number 9,496,326
- Issue date Nov 15, 2016
- International Business Machines Corporation
- Todd A. Christensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrostatic discharge protection device with power management
- Patent number 9,496,712
- Issue date Nov 15, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
High-density integrated circuit via capacitor
- Patent number 9,455,313
- Issue date Sep 27, 2016
- International Business Machines Corporation
- Todd A. Christensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupling capacitor using finFET topology
- Patent number 9,455,251
- Issue date Sep 27, 2016
- International Business Machines Corporation
- Todd A. Christensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,424,389
- Issue date Aug 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,396,303
- Issue date Jul 19, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Level shifter for a time-varying input
- Patent number 9,312,858
- Issue date Apr 12, 2016
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level shifter for a time-varying input
- Patent number 9,287,873
- Issue date Mar 15, 2016
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Partial update in a ternary content addressable memory
- Patent number 9,218,880
- Issue date Dec 22, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated decoupling capacitor utilizing through-silicon via
- Patent number 9,196,671
- Issue date Nov 24, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated decoupling capacitor utilizing through-silicon via
- Patent number 9,153,638
- Issue date Oct 6, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layout to minimize FET variation in small dimension photolithography
- Patent number 9,142,560
- Issue date Sep 22, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial update in a ternary content addressable memory
- Patent number 9,082,484
- Issue date Jul 14, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Grant
Power management SRAM write bit line drive circuit
- Patent number 9,058,861
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout to minimize FET variation in small dimension photolithography
- Patent number 8,860,141
- Issue date Oct 14, 2014
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Power management domino SRAM bit line discharge circuit
- Patent number 8,842,487
- Issue date Sep 23, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Single cycle data copy for two-port SRAM
- Patent number 8,824,196
- Issue date Sep 2, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical stacking of field effect transistor structures for logic g...
- Patent number 8,754,417
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Todd Alan Christensen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR CHIP TIMING ADJUSTMENT ENHANCEMENT
- Publication number 20230177243
- Publication date Jun 8, 2023
- International Business Machines Corporation
- TODD A. CHRISTENSEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...
- Publication number 20190311777
- Publication date Oct 10, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...
- Publication number 20190164623
- Publication date May 30, 2019
- International Business Machines Corporation
- Elizabeth L. Gerhard
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED SHIELDING AND DECOUPLING CAPACITOR STRUCTURE
- Publication number 20180145024
- Publication date May 24, 2018
- International Business Machines Corporation
- Todd A. CHRISTENSEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCING PERFORMANCE OF ONE OR MORE SLOWER PARTITIONS OF AN INTEGR...
- Publication number 20170344087
- Publication date Nov 30, 2017
- International Business Machines Corporation
- TODD A. CHRISTENSEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP DIAGNOSTIC CIRCUITRY MONITORING MULTIPLE CYCLES OF SIGNAL S...
- Publication number 20170242066
- Publication date Aug 24, 2017
- International Business Machines Corporation
- Anthony G. AIPPERSPACH
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM
- Publication number 20170236571
- Publication date Aug 17, 2017
- International Business Machines Corporation
- Todd A. Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM
- Publication number 20170148527
- Publication date May 25, 2017
- International Business Machines Corporation
- Todd A. Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTING MAXIMUM VOLTAGE BETWEEN MULTIPLE POWER SUPPLIES FOR MEMOR...
- Publication number 20170047099
- Publication date Feb 16, 2017
- International Business Machines Corporation
- Anthony G. AIPPERSPACH
- G11 - INFORMATION STORAGE
Information Patent Application
FINFET POWER SUPPLY DECOUPLING
- Publication number 20160379928
- Publication date Dec 29, 2016
- International Business Machines Corporation
- Todd A. CHRISTENSEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT
- Publication number 20160322813
- Publication date Nov 3, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT
- Publication number 20160322812
- Publication date Nov 3, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180004
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180009
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTER FOR A TIME-VARYING INPUT
- Publication number 20150349778
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTER FOR A TIME-VARYING INPUT
- Publication number 20150349779
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Derick G. Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20150179262
- Publication date Jun 25, 2015
- International Business Machines Corporation
- Igor Arsovski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY
- Publication number 20150179261
- Publication date Jun 25, 2015
- International Business Machines Corporation
- Igor Arsovski
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY
- Publication number 20140353764
- Publication date Dec 4, 2014
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGEMENT OF SRAM INITIALIZATION
- Publication number 20140293679
- Publication date Oct 2, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT SRAM WRITE BIT LINE DRIVE CIRCUIT
- Publication number 20140169076
- Publication date Jun 19, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149818
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149817
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT
- Publication number 20140126276
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA
- Publication number 20140127875
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT
- Publication number 20140126273
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA
- Publication number 20140124943
- Publication date May 8, 2014
- International Business Machines Corporation
- Derick G. Behrends
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT
- Publication number 20140092672
- Publication date Apr 3, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT
- Publication number 20140092696
- Publication date Apr 3, 2014
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Single Cycle Data Copy for Two-Port SRAM
- Publication number 20130258758
- Publication date Oct 3, 2013
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING

Todd A. Christensen

Person

Patents Grantslast 30 patents

Memory interface latch with integrated write-through and fence func...

Memory interface latch with integrated write-through and fence func...

On-chip diagnostic circuitry monitoring multiple cycles of signal s...

Memory interface latch with integrated write-through function

Implementing eFuse visual security of stored data using EDRAM

Enhancing performance of one or more slower partitions of an integr...

Integrated shielding and decoupling capacitor structure

Detecting maximum voltage between multiple power supplies for memor...

Implementing eFuse visual security of stored data using EDRAM

Electrostatic discharge protection device with power management

FinFET power supply decoupling

Implementing eFuse visual security of stored data using EDRAM

High-density integrated circuit via capacitor

Electrostatic discharge protection device with power management

High-density integrated circuit via capacitor

Decoupling capacitor using finFET topology

Implementing enhanced performance dynamic evaluation circuit by com...

Implementing enhanced performance dynamic evaluation circuit by com...

Level shifter for a time-varying input

Level shifter for a time-varying input

Partial update in a ternary content addressable memory

Integrated decoupling capacitor utilizing through-silicon via

Integrated decoupling capacitor utilizing through-silicon via

Layout to minimize FET variation in small dimension photolithography

Partial update in a ternary content addressable memory

Power management SRAM write bit line drive circuit

Layout to minimize FET variation in small dimension photolithography

Power management domino SRAM bit line discharge circuit

Single cycle data copy for two-port SRAM

Vertical stacking of field effect transistor structures for logic g...

Patents Applicationslast 30 patents

PROCESSOR CHIP TIMING ADJUSTMENT ENHANCEMENT

MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...

MEMORY INTERFACE LATCH WITH INTEGRATED WRITE-THROUGH AND FENCE FUNC...

INTEGRATED SHIELDING AND DECOUPLING CAPACITOR STRUCTURE

ENHANCING PERFORMANCE OF ONE OR MORE SLOWER PARTITIONS OF AN INTEGR...

ON-CHIP DIAGNOSTIC CIRCUITRY MONITORING MULTIPLE CYCLES OF SIGNAL S...

IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM

IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM

DETECTING MAXIMUM VOLTAGE BETWEEN MULTIPLE POWER SUPPLIES FOR MEMOR...

FINFET POWER SUPPLY DECOUPLING

ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT

ELECTROSTATIC DISCHARGE PROTECTION DEVICE WITH POWER MANAGEMENT

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

LEVEL SHIFTER FOR A TIME-VARYING INPUT

LEVEL SHIFTER FOR A TIME-VARYING INPUT

PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY

PARTIAL UPDATE IN A TERNARY CONTENT ADDRESSABLE MEMORY

LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY

MANAGEMENT OF SRAM INITIALIZATION

POWER MANAGEMENT SRAM WRITE BIT LINE DRIVE CIRCUIT

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT

INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA

POWER MANAGEMENT SRAM GLOBAL BIT LINE PRECHARGE CIRCUIT

INTEGRATED DECOUPLING CAPACITOR UTILIZING THROUGH-SILICON VIA

POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT

POWER MANAGEMENT DOMINO SRAM BIT LINE DISCHARGE CIRCUIT

Single Cycle Data Copy for Two-Port SRAM