Todd A. Randazzo

Person

Morristown, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
High speed multiple memory interface I/O cell
- Patent number 8,912,818
- Issue date Dec 16, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Grant
Neutron detector cell efficiency
- Patent number 8,399,845
- Issue date Mar 19, 2013
- Honeywell International Inc.
- Paul S. Fechner
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed multiple memory interface I/O cell
- Patent number 8,324,927
- Issue date Dec 4, 2012
- LSI Corporation
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive voltage-down regulator for integrated circuit receivers
- Patent number 8,315,588
- Issue date Nov 20, 2012
- LSI Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Neutron detector with wafer-to-wafer bonding
- Patent number 8,310,021
- Issue date Nov 13, 2012
- Honeywell International Inc.
- Bradley J. Larsen
- G01 - MEASURING TESTING
Information Patent Grant
Neutron detector cell efficiency
- Patent number 8,153,985
- Issue date Apr 10, 2012
- Honeywell International Inc.
- Todd Andrew Randazzo
- G11 - INFORMATION STORAGE
Information Patent Grant
Transceiver with fault tolerant driver
- Patent number 7,948,275
- Issue date May 24, 2011
- LSI Corporation
- Todd Randazzo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed multiple memory interface I/O cell
- Patent number 7,876,123
- Issue date Jan 25, 2011
- LSI Corporation
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI on package hypersensitive sensor
- Patent number 7,868,362
- Issue date Jan 11, 2011
- Honeywell International Inc.
- Todd Andrew Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of a known common-mode voltage for input overvoltage protection...
- Patent number 7,457,090
- Issue date Nov 25, 2008
- LSI Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for summing DC voltages
- Patent number 7,180,360
- Issue date Feb 20, 2007
- LSI Logic Corporation
- Todd A. Randazzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analog capacitor in dual damascene process
- Patent number 7,176,082
- Issue date Feb 13, 2007
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable transmit SCSI equalization
- Patent number 6,931,560
- Issue date Aug 16, 2005
- LSI Logic Corporation
- Edson W. Porter
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Level shifter reference generator
- Patent number 6,924,689
- Issue date Aug 2, 2005
- LSI Logic Corporation
- Todd A. Randazzo
- G05 - CONTROLLING REGULATING
Information Patent Grant
Low voltage breakdown element for ESD trigger device
- Patent number 6,855,586
- Issue date Feb 15, 2005
- LSI Logic Corporation
- John de Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS varactor with constant dC/dV characteristic
- Patent number 6,825,546
- Issue date Nov 30, 2004
- LSI Logic Corporation
- John Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Analog capacitor in dual damascene process
- Patent number 6,822,282
- Issue date Nov 23, 2004
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS level shifters using native devices
- Patent number 6,803,801
- Issue date Oct 12, 2004
- LSI Logic Corporation
- Todd Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for determining temperature of a semiconductor...
- Patent number 6,794,310
- Issue date Sep 21, 2004
- LSI Logic Corporation
- Gayle W. Miller
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Low voltage breakdown element for ESD trigger device
- Patent number 6,710,990
- Issue date Mar 23, 2004
- LSI Logic Corporation
- John de Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Control circuit for power
- Patent number 6,621,299
- Issue date Sep 16, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage level shifter
- Patent number 6,614,283
- Issue date Sep 2, 2003
- LSI Logic Corporation
- Peter Joseph Wright
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of forming analog capacitor dual damascene process
- Patent number 6,596,579
- Issue date Jul 22, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Swapped drain structures for electrostatic discharge protection
- Patent number 6,587,322
- Issue date Jul 1, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Linear capacitor and process for making same
- Patent number 6,545,305
- Issue date Apr 8, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with a pair of transistors having dual work fu...
- Patent number 6,514,824
- Issue date Feb 4, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed input buffer circuit
- Patent number 6,501,318
- Issue date Dec 31, 2002
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Swapped drain structures for electrostatic discharge protection
- Patent number 6,359,314
- Issue date Mar 19, 2002
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect-integrated metal-insulator-metal capacitor and method...
- Patent number 6,342,734
- Issue date Jan 29, 2002
- LSI Logic Corporation
- Derryl D. J. Allman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for determining temperature of a semiconductor...
- Patent number 6,328,802
- Issue date Dec 11, 2001
- LSI Logic Corporation
- Gayle W. Miller
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL
- Publication number 20130049799
- Publication date Feb 28, 2013
- LSI Corporation
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Application
NEUTRON DETECTOR CELL EFFICIENCY
- Publication number 20120228513
- Publication date Sep 13, 2012
- Honeywell International Inc.
- Paul S. Fechner
- G01 - MEASURING TESTING
Information Patent Application
NEUTRON DETECTOR WITH WAFER-TO-WAFER BONDING
- Publication number 20120012957
- Publication date Jan 19, 2012
- Honeywell International Inc.
- Bradley J. Larsen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
NEUTRON SENSOR WITH THIN INTERCONNECT STACK
- Publication number 20110186940
- Publication date Aug 4, 2011
- Honeywell International Inc.
- Todd Andrew Randazzo
- G01 - MEASURING TESTING
Information Patent Application
Neutron Detector Cell Efficiency
- Publication number 20110089331
- Publication date Apr 21, 2011
- Honywell International Inc.
- Todd Andrew Randazzo
- G01 - MEASURING TESTING
Information Patent Application
HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL
- Publication number 20110084725
- Publication date Apr 14, 2011
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Application
Heavy Ion Upset Hardened Floating Body SRAM Cells
- Publication number 20100200918
- Publication date Aug 12, 2010
- Honeywell International Inc.
- Bradley J. Larsen
- G11 - INFORMATION STORAGE
Information Patent Application
Planar Metal-Insulator-Metal Circuit Element and Method for Planar...
- Publication number 20100006912
- Publication date Jan 14, 2010
- Honeywell International Inc.
- Bradley J. Larsen
- G11 - INFORMATION STORAGE
Information Patent Application
SOI on Package Hypersensitive Sensor
- Publication number 20090096113
- Publication date Apr 16, 2009
- Honeywell International Inc.
- Todd Andrew Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High speed multiple memory interface I/O cell
- Publication number 20090091349
- Publication date Apr 9, 2009
- Dharmesh Bhakta
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSCEIVER WITH FAULT TOLERANT DRIVER
- Publication number 20080170607
- Publication date Jul 17, 2008
- LSI Corporation
- Todd Randazzo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for summing DC voltages
- Publication number 20060103447
- Publication date May 18, 2006
- LSI Logic Corporation
- Todd A. Randazzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of a known common-mode voltage for input overvoltage protection...
- Publication number 20060103999
- Publication date May 18, 2006
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Resistive voltage-down regulator for integrated circuit receivers
- Publication number 20050245226
- Publication date Nov 3, 2005
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Analog capacitor in dual damascene process
- Publication number 20050042818
- Publication date Feb 24, 2005
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low voltage breakdown element for ESD trigger device
- Publication number 20040104436
- Publication date Jun 3, 2004
- John de Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS level shifters using native devices
- Publication number 20040090259
- Publication date May 13, 2004
- Todd Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Level shifter reference generator
- Publication number 20030227313
- Publication date Dec 11, 2003
- Todd A. Randazzo
- G05 - CONTROLLING REGULATING
Information Patent Application
Analog capacitor in dual damascene process
- Publication number 20030176035
- Publication date Sep 18, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low voltage breakdown element for ESD trigger device
- Publication number 20030137789
- Publication date Jul 24, 2003
- John de Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High speed input
- Publication number 20030042943
- Publication date Mar 6, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Swapped drain structures for electrostatic discharge protection
- Publication number 20020055219
- Publication date May 9, 2002
- Todd A. Randazzo
- H01 - BASIC ELECTRIC ELEMENTS

Todd A. Randazzo

Person

Patents Grantslast 30 patents

High speed multiple memory interface I/O cell

Neutron detector cell efficiency

High speed multiple memory interface I/O cell

Resistive voltage-down regulator for integrated circuit receivers

Neutron detector with wafer-to-wafer bonding

Neutron detector cell efficiency

Transceiver with fault tolerant driver

High speed multiple memory interface I/O cell

SOI on package hypersensitive sensor

Use of a known common-mode voltage for input overvoltage protection...

Method and apparatus for summing DC voltages

Analog capacitor in dual damascene process

Programmable transmit SCSI equalization

Level shifter reference generator

Low voltage breakdown element for ESD trigger device

CMOS varactor with constant dC/dV characteristic

Analog capacitor in dual damascene process

CMOS level shifters using native devices

Method and apparatus for determining temperature of a semiconductor...

Low voltage breakdown element for ESD trigger device

Control circuit for power

Voltage level shifter

Method of forming analog capacitor dual damascene process

Swapped drain structures for electrostatic discharge protection

Linear capacitor and process for making same

Semiconductor device with a pair of transistors having dual work fu...

High speed input buffer circuit

Swapped drain structures for electrostatic discharge protection

Interconnect-integrated metal-insulator-metal capacitor and method...

Method and apparatus for determining temperature of a semiconductor...

Patents Applicationslast 30 patents

HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL

NEUTRON DETECTOR CELL EFFICIENCY

NEUTRON DETECTOR WITH WAFER-TO-WAFER BONDING

NEUTRON SENSOR WITH THIN INTERCONNECT STACK

Neutron Detector Cell Efficiency

HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL

Heavy Ion Upset Hardened Floating Body SRAM Cells

Planar Metal-Insulator-Metal Circuit Element and Method for Planar...

SOI on Package Hypersensitive Sensor

High speed multiple memory interface I/O cell

TRANSCEIVER WITH FAULT TOLERANT DRIVER

Method and apparatus for summing DC voltages

Use of a known common-mode voltage for input overvoltage protection...

Resistive voltage-down regulator for integrated circuit receivers

Analog capacitor in dual damascene process

Low voltage breakdown element for ESD trigger device

CMOS level shifters using native devices

Level shifter reference generator

Analog capacitor in dual damascene process

Low voltage breakdown element for ESD trigger device

High speed input

Swapped drain structures for electrostatic discharge protection