Todd Bystrom

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and systems for recovering intermittent timing-reference si...
- Patent number 9,389,637
- Issue date Jul 12, 2016
- Rambus Inc.
- Huy Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,349,422
- Issue date May 24, 2016
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,036,436
- Issue date May 19, 2015
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling DRAM at time DRAM ready to receive command when exiting...
- Patent number 8,756,395
- Issue date Jun 17, 2014
- Rambus Inc.
- Richard M. Barth
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock-data recovery (“CDR”) circuit, apparatus and method for varia...
- Patent number 8,130,891
- Issue date Mar 6, 2012
- Rambus Inc.
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of operation of a memory device and system including initial...
- Patent number 8,127,152
- Issue date Feb 28, 2012
- Rambus Inc.
- Richard M. Barth
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock-data recovery (“CDR”) circuit, apparatus and method for varia...
- Patent number 7,668,271
- Issue date Feb 23, 2010
- Rambus Inc.
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System for a memory device having a power down mode and method
- Patent number 7,581,121
- Issue date Aug 25, 2009
- Rambus Inc.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having a power down exit register
- Patent number 7,574,616
- Issue date Aug 11, 2009
- Rambus Inc.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and module including a memory device having a power down mode
- Patent number 7,571,330
- Issue date Aug 4, 2009
- Rambus Inc.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLL lock detection circuit using edge detection and a state machine
- Patent number 7,084,681
- Issue date Aug 1, 2006
- Rambus Inc.
- Michael Green
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL lock detection circuit using edge detection
- Patent number 6,879,195
- Issue date Apr 12, 2005
- Rambus, Inc.
- Michael Green
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for configuring access times of memory devices
- Patent number 6,842,864
- Issue date Jan 11, 2005
- Rambus Inc.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for initializing dynamic random access memory...
- Patent number 6,154,821
- Issue date Nov 28, 2000
- Rambus Inc.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20150310903
- Publication date Oct 29, 2015
- RAMBUS INC.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20130301368
- Publication date Nov 14, 2013
- RAMBUS INC.
- Akash Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Systems for Recovering Intermittent Timing-Reference Si...
- Publication number 20130290766
- Publication date Oct 31, 2013
- RAMBUS INC.
- Huy Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF OPERATION OF A MEMORY DEVICE AND SYSTEM INCLUDING INITIAL...
- Publication number 20120216059
- Publication date Aug 23, 2012
- RAMBUS INC.
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock-Data Recovery ("CDR") Circuit, Apparatus And Method For Varia...
- Publication number 20100150290
- Publication date Jun 17, 2010
- RAMBUS INC.
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System for a memory device having a power down mode and method
- Publication number 20050235130
- Publication date Oct 20, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and module including a memory device having a power down mode
- Publication number 20050216654
- Publication date Sep 29, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for initializing dynamic random access memory...
- Publication number 20050193183
- Publication date Sep 1, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLL lock detection circuit using edge detection and a state machine
- Publication number 20050162199
- Publication date Jul 28, 2005
- Rambus, Inc.
- Michael Green
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory device and method of operation of a memory device
- Publication number 20050154853
- Publication date Jul 14, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of operation and controlling a memory device
- Publication number 20050154817
- Publication date Jul 14, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods of operation of a memory device and system
- Publication number 20050120161
- Publication date Jun 2, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock-data recovery ("CDR") circuit, apparatus and method for varia...
- Publication number 20050069071
- Publication date Mar 31, 2005
- Dennis Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory device having a power down exit register
- Publication number 20050060487
- Publication date Mar 17, 2005
- Richard M. Barth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLL lock detection circuit using edge detection
- Publication number 20050012524
- Publication date Jan 20, 2005
- Rambus, Inc.
- Michael Green
- H03 - BASIC ELECTRONIC CIRCUITRY

Todd Bystrom

Person

Patents Grantslast 30 patents

Methods and systems for recovering intermittent timing-reference si...

Supporting calibration for sub-rate operation in clocked memory sys...

Supporting calibration for sub-rate operation in clocked memory sys...

Controlling DRAM at time DRAM ready to receive command when exiting...

Clock-data recovery (“CDR”) circuit, apparatus and method for varia...

Method of operation of a memory device and system including initial...

Clock-data recovery (“CDR”) circuit, apparatus and method for varia...

System for a memory device having a power down mode and method

Memory device having a power down exit register

System and module including a memory device having a power down mode

PLL lock detection circuit using edge detection and a state machine

PLL lock detection circuit using edge detection

Method and apparatus for configuring access times of memory devices

Method and apparatus for initializing dynamic random access memory...

Patents Applicationslast 30 patents

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

Methods and Systems for Recovering Intermittent Timing-Reference Si...

METHOD OF OPERATION OF A MEMORY DEVICE AND SYSTEM INCLUDING INITIAL...

Clock-Data Recovery ("CDR") Circuit, Apparatus And Method For Varia...

System for a memory device having a power down mode and method

System and module including a memory device having a power down mode

Method and apparatus for initializing dynamic random access memory...

PLL lock detection circuit using edge detection and a state machine

Memory device and method of operation of a memory device

Method of operation and controlling a memory device

Methods of operation of a memory device and system

Clock-data recovery ("CDR") circuit, apparatus and method for varia...

Memory device having a power down exit register

PLL lock detection circuit using edge detection