Todd Hiers

Person

Houston, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and mechanism to bypass PCIE address translation by using...
- Patent number 12,056,073
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and mechanism to bypass PCIe address translation by using...
- Patent number 11,449,444
- Issue date Sep 20, 2022
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip (SoC) assembly, configurable IP generation and IP in...
- Patent number 11,418,409
- Issue date Aug 16, 2022
- Texas Instruments Incorporated
- Todd Christopher Hiers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip (SoC) assembly, configurable IP generation and IP in...
- Patent number 10,911,323
- Issue date Feb 2, 2021
- Texas Instruments Incorporated
- Todd Christopher Hiers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and mechanism to bypass PCIe address translation by using...
- Patent number 10,402,355
- Issue date Sep 3, 2019
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichannel video port interface using no external memory
- Patent number 9,380,260
- Issue date Jun 28, 2016
- Texas Instruments Incorporated
- Jason Meiners
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-latency multichannel video port aggregator
- Patent number 8,443,413
- Issue date May 14, 2013
- Texas Instruments Incorporated
- Todd C. Hiers
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for processing video
- Patent number 8,380,053
- Issue date Feb 19, 2013
- Texas Instruments Incorporated
- Thanh T. Tran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...
- Publication number 20240394206
- Publication date Nov 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...
- Publication number 20230018225
- Publication date Jan 19, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP IN...
- Publication number 20210160151
- Publication date May 27, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Todd Christopher HIERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Mechanism to Bypass PCIe Address Translation By Using...
- Publication number 20190391941
- Publication date Dec 26, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Mechanism to Bypass PCIe Address Translation By Using...
- Publication number 20180225238
- Publication date Aug 9, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP IN...
- Publication number 20180212839
- Publication date Jul 26, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Todd Christopher HIERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multichannel Video Port Interface Using No External Memory
- Publication number 20100188569
- Publication date Jul 29, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Jason Meiners
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Processing Video
- Publication number 20100142931
- Publication date Jun 10, 2010
- Thanh T. Tran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Low-Latency Multichannel Video Port Aggregator
- Publication number 20090158379
- Publication date Jun 18, 2009
- Todd C. Hiers
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Apparatus and mechanism to bypass PCIE address translation by using...

Apparatus and mechanism to bypass PCIe address translation by using...

System-on-chip (SoC) assembly, configurable IP generation and IP in...

System-on-chip (SoC) assembly, configurable IP generation and IP in...

Apparatus and mechanism to bypass PCIe address translation by using...

Multichannel video port interface using no external memory

Low-latency multichannel video port aggregator

System and method for processing video

Patents Applicationslast 30 patents

APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...

APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...

SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP IN...

Apparatus and Mechanism to Bypass PCIe Address Translation By Using...

Apparatus and Mechanism to Bypass PCIe Address Translation By Using...

SYSTEM-ON-CHIP (SoC) ASSEMBLY, CONFIGURABLE IP GENERATION AND IP IN...

Multichannel Video Port Interface Using No External Memory

System and Method for Processing Video

Low-Latency Multichannel Video Port Aggregator