Todd R. Abbott

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Photoresist processing methods
- Patent number 8,685,625
- Issue date Apr 1, 2014
- Micron Technology, Inc.
- Kevin J. Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Flash memory with recessed floating gate
- Patent number 8,614,473
- Issue date Dec 24, 2013
- Micron Technology, Inc.
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory with recessed floating gate
- Patent number 8,482,050
- Issue date Jul 9, 2013
- Micron Technology, Inc.
- Todd Abbott
Information Patent Grant
DRAM layout with vertical FETS and method of formation
- Patent number 8,482,047
- Issue date Jul 9, 2013
- Micron Technology, Inc.
- Todd R. Abbott
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 8,389,360
- Issue date Mar 5, 2013
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photoresist processing methods
- Patent number 8,283,112
- Issue date Oct 9, 2012
- Micron Technology, Inc.
- Kevin J. Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 8,274,106
- Issue date Sep 25, 2012
- Micron Technology, Inc.
- Todd R. Abbott
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
DRAM layout with vertical FETS and method of formation
- Patent number 7,989,866
- Issue date Aug 2, 2011
- Micron Technology, Inc.
- Todd R. Abbott
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Flash memory with recessed floating gate
- Patent number 7,982,255
- Issue date Jul 19, 2011
- Micron Technology, Inc.
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photoresist processing methods
- Patent number 7,977,037
- Issue date Jul 12, 2011
- Micron Technology, Inc.
- Kevin J. Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 7,968,928
- Issue date Jun 28, 2011
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM including a vertical surround gate transistor
- Patent number 7,768,051
- Issue date Aug 3, 2010
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM layout with vertical FETS and method of formation
- Patent number 7,736,969
- Issue date Jun 15, 2010
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory with recessed floating gate
- Patent number 7,723,185
- Issue date May 25, 2010
- Micron Technology, Inc.
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM including a vertical surround gate transistor
- Patent number 7,566,620
- Issue date Jul 28, 2009
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 7,560,336
- Issue date Jul 14, 2009
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 7,518,182
- Issue date Apr 14, 2009
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor constructions
- Patent number 7,453,103
- Issue date Nov 18, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cells and select gates of NAND memory arrays
- Patent number 7,402,861
- Issue date Jul 22, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DRAM layout with vertical FETs and method of formation
- Patent number 7,365,385
- Issue date Apr 29, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a transistor with an integrated metal silicide g...
- Patent number 7,351,659
- Issue date Apr 1, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of memory cells and select gates of NAND memory arrays
- Patent number 7,348,236
- Issue date Mar 25, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory with recessed floating gate
- Patent number 7,342,272
- Issue date Mar 11, 2008
- Micron Technology, Inc.
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive structure for microelectronic devices and methods of fab...
- Patent number 7,319,605
- Issue date Jan 15, 2008
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
NAND memory arrays and methods
- Patent number 7,276,414
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Michael Violette
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of forming semiconductor structures
- Patent number 7,262,089
- Issue date Aug 28, 2007
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor damascene trench and methods thereof
- Patent number 7,179,730
- Issue date Feb 20, 2007
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a field effect transistor with halo implant regions
- Patent number 7,153,731
- Issue date Dec 26, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a field effect transistor
- Patent number 7,112,482
- Issue date Sep 26, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor damascene trench and methods thereof
- Patent number 7,029,963
- Issue date Apr 18, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Photoresist Processing Methods
- Publication number 20130017494
- Publication date Jan 17, 2013
- Micron Technology, Inc.
- Kevin J. Torek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM Layout with Vertical FETS and Method of Formation
- Publication number 20130001663
- Publication date Jan 3, 2013
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY WITH RECESSED FLOATING GATE
- Publication number 20110316068
- Publication date Dec 29, 2011
- Micron Technology, Inc.
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM Layout with Vertical FETS and Method of Formation
- Publication number 20110254067
- Publication date Oct 20, 2011
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist Processing Methods
- Publication number 20110244404
- Publication date Oct 6, 2011
- Micron Technology, Inc.
- Kevin J. Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
- Publication number 20110217819
- Publication date Sep 8, 2011
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist Processing Methods
- Publication number 20110159698
- Publication date Jun 30, 2011
- Micron Technology, Inc.
- Kevin Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
DRAM Layout with Vertical FETS and Method of Formation
- Publication number 20100052027
- Publication date Mar 4, 2010
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM layout with vertical FETs and method of formation
- Publication number 20080237776
- Publication date Oct 2, 2008
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY WITH RECESSED FLOATING GATE
- Publication number 20080149994
- Publication date Jun 26, 2008
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY WITH RECESSED FLOATING GATE
- Publication number 20080153233
- Publication date Jun 26, 2008
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist processing methods
- Publication number 20080050925
- Publication date Feb 28, 2008
- Micron Technology, Inc.
- Kevin J. Torek
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Dram including a vertical surround gate transistor
- Publication number 20070090363
- Publication date Apr 26, 2007
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND memory arrays
- Publication number 20070063262
- Publication date Mar 22, 2007
- Micron Technology, Inc.
- Michael Violette
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory with recessed floating gate
- Publication number 20070048935
- Publication date Mar 1, 2007
- Todd Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM INCLUDING A VERTICAL SURROUND GATE TRANSISTOR
- Publication number 20070018223
- Publication date Jan 25, 2007
- Micron Technology Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DAMASCENE TRENCH AND METHODS THEREOF
- Publication number 20060281302
- Publication date Dec 14, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND memory arrays
- Publication number 20060258093
- Publication date Nov 16, 2006
- Micron Technology, Inc.
- Michael Violette
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor damascene trench and methods thereof
- Publication number 20060134898
- Publication date Jun 22, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM layout with vertical FETs and method of formation
- Publication number 20060125123
- Publication date Jun 15, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor constructions
- Publication number 20060081884
- Publication date Apr 20, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM layout with vertical FETs and method of formation
- Publication number 20060043617
- Publication date Mar 2, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND memory arrays and methods
- Publication number 20060040447
- Publication date Feb 23, 2006
- Micron Technlogy, Inc.
- Michael Violette
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM layout with vertical FETS and method of formation
- Publication number 20060038205
- Publication date Feb 23, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of forming a transistor with an integrated metal silicide g...
- Publication number 20060019457
- Publication date Jan 26, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAM layout with vertical FETS and method of formation
- Publication number 20060017088
- Publication date Jan 26, 2006
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory cells and select gates of NAND memory arrays
- Publication number 20060006456
- Publication date Jan 12, 2006
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Formation of memory cells and select gates of NAND memory arrays
- Publication number 20050285178
- Publication date Dec 29, 2005
- Micron Technology, Inc.
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Suppression of cross diffusion and gate depletion
- Publication number 20050266666
- Publication date Dec 1, 2005
- Jigish D. Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor constructions, and methods of forming semiconductor s...
- Publication number 20050199932
- Publication date Sep 15, 2005
- Todd R. Abbott
- H01 - BASIC ELECTRIC ELEMENTS

Todd R. Abbott

Person

Patents Grantslast 30 patents

Photoresist processing methods

Flash memory with recessed floating gate

Flash memory with recessed floating gate

DRAM layout with vertical FETS and method of formation

DRAM layout with vertical FETs and method of formation

Photoresist processing methods

DRAM layout with vertical FETs and method of formation

DRAM layout with vertical FETS and method of formation

Flash memory with recessed floating gate

Photoresist processing methods

DRAM layout with vertical FETs and method of formation

DRAM including a vertical surround gate transistor

DRAM layout with vertical FETS and method of formation

Flash memory with recessed floating gate

DRAM including a vertical surround gate transistor

DRAM layout with vertical FETs and method of formation

DRAM layout with vertical FETs and method of formation

Semiconductor constructions

Memory cells and select gates of NAND memory arrays

DRAM layout with vertical FETs and method of formation

Methods of forming a transistor with an integrated metal silicide g...

Formation of memory cells and select gates of NAND memory arrays

Flash memory with recessed floating gate

Conductive structure for microelectronic devices and methods of fab...

NAND memory arrays and methods

Methods of forming semiconductor structures

Semiconductor damascene trench and methods thereof

Method of forming a field effect transistor with halo implant regions

Method of forming a field effect transistor

Semiconductor damascene trench and methods thereof

Patents Applicationslast 30 patents

Photoresist Processing Methods

DRAM Layout with Vertical FETS and Method of Formation

FLASH MEMORY WITH RECESSED FLOATING GATE

DRAM Layout with Vertical FETS and Method of Formation

Photoresist Processing Methods

DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION

Photoresist Processing Methods

DRAM Layout with Vertical FETS and Method of Formation

DRAM layout with vertical FETs and method of formation

FLASH MEMORY WITH RECESSED FLOATING GATE

FLASH MEMORY WITH RECESSED FLOATING GATE

Photoresist processing methods

Dram including a vertical surround gate transistor

NAND memory arrays

Flash memory with recessed floating gate

DRAM INCLUDING A VERTICAL SURROUND GATE TRANSISTOR

SEMICONDUCTOR DAMASCENE TRENCH AND METHODS THEREOF

NAND memory arrays

Semiconductor damascene trench and methods thereof

DRAM layout with vertical FETs and method of formation

Semiconductor constructions

DRAM layout with vertical FETs and method of formation

NAND memory arrays and methods

DRAM layout with vertical FETS and method of formation

Methods of forming a transistor with an integrated metal silicide g...

DRAM layout with vertical FETS and method of formation

Memory cells and select gates of NAND memory arrays

Formation of memory cells and select gates of NAND memory arrays

Suppression of cross diffusion and gate depletion

Semiconductor constructions, and methods of forming semiconductor s...