Todd Wayne

Person

Soquel, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Automatic test component generation and inclusion into simulation t...
- Patent number 7,730,435
- Issue date Jun 1, 2010
- Altera Corporation
- Jeffrey Orion Pritchard
- G01 - MEASURING TESTING
Information Patent Grant
Scheduling logic on a programmable device implemented using a high-...
- Patent number 7,409,670
- Issue date Aug 5, 2008
- Altera Corporation
- J. Orion Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-random wait-state and pseudo-random latency components
- Patent number 7,409,608
- Issue date Aug 5, 2008
- Altera Corporation
- Aaron Ferrucci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating components on a programmable device using a high-level l...
- Patent number 7,370,311
- Issue date May 6, 2008
- Altera Corporation
- Jeffrey Orion Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for variable latency support
- Patent number 7,353,484
- Issue date Apr 1, 2008
- Altera Corporation
- J. Orion Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for automatic test component generation and i...
- Patent number 7,225,416
- Issue date May 29, 2007
- Altera Corporation
- Jeffrey Orion Pritchard
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for tristate line sharing
- Patent number 7,149,827
- Issue date Dec 12, 2006
- Altera Corporation
- J. Orion Pritchard
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Automatic test component generation and inclusion into simulation t...
- Publication number 20070234247
- Publication date Oct 4, 2007
- Altera Corporation
- Jeffrey Orion Pritchard
- G01 - MEASURING TESTING

Person

Patents Grantslast 30 patents

Automatic test component generation and inclusion into simulation t...

Scheduling logic on a programmable device implemented using a high-...

Pseudo-random wait-state and pseudo-random latency components

Generating components on a programmable device using a high-level l...

Methods and apparatus for variable latency support

Methods and apparatus for automatic test component generation and i...

Methods and apparatus for tristate line sharing

Patents Applicationslast 30 patents

Automatic test component generation and inclusion into simulation t...