Tom Elmer

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Increasing performance of computational array accelerators
- Patent number 12,182,691
- Issue date Dec 31, 2024
- Amazon Technologies, Inc.
- Sundeep Amirineni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 12,182,064
- Issue date Dec 31, 2024
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array including fused multiply accumulate with efficient p...
- Patent number 12,067,375
- Issue date Aug 20, 2024
- Amazon Technologies, Inc.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array with efficient input reduction and extended array pe...
- Patent number 11,880,682
- Issue date Jan 23, 2024
- Amazon Technologies, Inc.
- Paul Gilbert Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic multiply delayed accumulate processor architecture
- Patent number 11,842,169
- Issue date Dec 12, 2023
- Amazon Technologies, Inc.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array component combining multiple integer and floating-po...
- Patent number 11,816,446
- Issue date Nov 14, 2023
- Amazon Technologies, Inc.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 11,762,803
- Issue date Sep 19, 2023
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array including fused multiply accumulate with efficient p...
- Patent number 11,467,806
- Issue date Oct 11, 2022
- Amazon Technologies, Inc.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable function approximation based on switching mapping tabl...
- Patent number 11,423,313
- Issue date Aug 23, 2022
- Amazon Technologies, Inc.
- Ron Diamant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple busses within a systolic array processing element
- Patent number 11,422,773
- Issue date Aug 23, 2022
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 11,308,027
- Issue date Apr 19, 2022
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple busses interleaved in a systolic array
- Patent number 11,308,026
- Issue date Apr 19, 2022
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallelism within a systolic array using multiple accumulate busses
- Patent number 11,232,062
- Issue date Jan 25, 2022
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chained split execution of fused compound arithmetic operations
- Patent number 11,061,672
- Issue date Jul 13, 2021
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerated quantized multiply-and-add operations
- Patent number 10,983,754
- Issue date Apr 20, 2021
- Amazon Technologies, Inc.
- Dana Michelle Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing dynamic power consumption in arrays
- Patent number 10,817,260
- Issue date Oct 27, 2020
- Amazon Technologies, Inc.
- Randy Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerated quantized multiply-and-add operations
- Patent number 10,678,508
- Issue date Jun 9, 2020
- Amazon Technologies, Inc.
- Dana Michelle Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing denormal numbers in FMA hardware
- Patent number 10,078,512
- Issue date Sep 18, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculation control indicator cache
- Patent number 10,019,229
- Issue date Jul 10, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculation control indicator cache
- Patent number 10,019,230
- Issue date Jul 10, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split-path heuristic for performing a fused FMA operation
- Patent number 9,891,886
- Issue date Feb 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Subdivision of a fused compound arithmetic operation
- Patent number 9,891,887
- Issue date Feb 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard format intermediate result
- Patent number 9,798,519
- Issue date Oct 24, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporally split fused multiply-accumulate operation
- Patent number 9,778,908
- Issue date Oct 3, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-atomic split-path fused multiply-accumulate
- Patent number 9,778,907
- Issue date Oct 3, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leading sign digit predictor for floating point near subtractor
- Patent number 8,620,983
- Issue date Dec 31, 2013
- Via Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-atomic scheduling of micro-operations to perform round instruction
- Patent number 8,386,755
- Issue date Feb 26, 2013
- Via Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for optimizing the performance of x87 floating...
- Patent number 8,046,400
- Issue date Oct 25, 2011
- Via Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maintaining status coherency between queue...
- Patent number 6,983,358
- Issue date Jan 3, 2006
- IP First, LLC
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having vector processing capability and method for execut...
- Patent number 6,324,638
- Issue date Nov 27, 2001
- International Business Machines Corporation
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...
- Publication number 20240361986
- Publication date Oct 31, 2024
- AMAZON TECHNOLOGIES, INC.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY
- Publication number 20230385233
- Publication date Nov 30, 2023
- AMAZON TECHNOLOGIES, INC.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIPLE ADDER
- Publication number 20230266942
- Publication date Aug 24, 2023
- ARM Limited
- Javier Diaz BRUGUERA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...
- Publication number 20230010054
- Publication date Jan 12, 2023
- AMAZON TECHNOLOGIES, INC.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY WITH EFFICIENT INPUT REDUCTION AND EXTENDED ARRAY PE...
- Publication number 20230004384
- Publication date Jan 5, 2023
- AMAZON TECHNOLOGIES, INC.
- Paul Gilbert Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY WITH INPUT REDUCTION TO MULTIPLE REDUCED INPUTS
- Publication number 20230004523
- Publication date Jan 5, 2023
- AMAZON TECHNOLOGIES, INC.
- Paul Gilbert Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY
- Publication number 20220350775
- Publication date Nov 3, 2022
- AMAZON TECHNOLOGIES, INC.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY COMPONENT COMBINING MULTIPLE INTEGER AND FLOATING-PO...
- Publication number 20210157549
- Publication date May 27, 2021
- AMAZON TECHNOLOGIES, INC.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...
- Publication number 20210157548
- Publication date May 27, 2021
- AMAZON TECHNOLOGIES, INC.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED QUANTIZED MULTIPLY-AND-ADD OPERATIONS
- Publication number 20200293284
- Publication date Sep 17, 2020
- AMAZON TECHNOLOGIES, INC.
- Dana Michelle Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED QUANTIZED MULTIPLY-AND-ADD OPERATIONS
- Publication number 20190294413
- Publication date Sep 26, 2019
- AMAZON TECHNOLOGIES, INC.
- Dana Michelle Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DENORMAL NUMBERS IN FMA HARDWARE
- Publication number 20180095749
- Publication date Apr 5, 2018
- VIA Alliance Semiconductor Co., Ltd.
- THOMAS ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHAINED SPLIT EXECUTION OF FUSED COMPOUND ARITHMETIC OPERATIONS
- Publication number 20170097824
- Publication date Apr 6, 2017
- VIA Alliance Semiconductor Co., Ltd.
- THOMAS ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-ATOMIC SPLIT-PATH FUSED MULTIPLY-ACCUMULATE
- Publication number 20160004504
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STANDARD FORMAT INTERMEDIATE RESULT
- Publication number 20160004506
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUBDIVISION OF A FUSED COMPOUND ARITHMETIC OPERATION
- Publication number 20160004508
- Publication date Jan 7, 2016
- VIA Alliance Semiconductor Co., Ltd.
- THOMAS ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPORALLY SPLIT FUSED MULTIPLY-ACCUMULATE OPERATION
- Publication number 20160004505
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT-PATH HEURISTIC FOR PERFORMING A FUSED FMA OPERATION
- Publication number 20160004507
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALCULATION CONTROL INDICATOR CACHE
- Publication number 20160004665
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALCULATION CONTROL INDICATOR CACHE
- Publication number 20160004509
- Publication date Jan 7, 2016
- VIA ALLIANCE SEMICONDUCTOR CO, LTD.
- Thomas ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEADING SIGN DIGIT PREDICTOR FOR FLOATING POINT NEAR SUBTRACTOR
- Publication number 20120173597
- Publication date Jul 5, 2012
- VIA Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-ATOMIC SCHEDULING OF MICRO-OPERATIONS TO PERFORM ROUND INSTRUCTION
- Publication number 20110029760
- Publication date Feb 3, 2011
- VIA Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR OPTIMIZING THE PERFORMANCE OF X87 FLOATING...
- Publication number 20090259708
- Publication date Oct 15, 2009
- VIA Technologies, Inc.
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MAINTAINING STATUS COHERENCY BETWEEN QUEUE...
- Publication number 20050273579
- Publication date Dec 8, 2005
- IP-First, LLC
- Tom Elmer
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Increasing performance of computational array accelerators

Multiple accumulate busses in a systolic array

Systolic array including fused multiply accumulate with efficient p...

Systolic array with efficient input reduction and extended array pe...

Systolic multiply delayed accumulate processor architecture

Systolic array component combining multiple integer and floating-po...

Multiple accumulate busses in a systolic array

Systolic array including fused multiply accumulate with efficient p...

Configurable function approximation based on switching mapping tabl...

Multiple busses within a systolic array processing element

Multiple accumulate busses in a systolic array

Multiple busses interleaved in a systolic array

Parallelism within a systolic array using multiple accumulate busses

Chained split execution of fused compound arithmetic operations

Accelerated quantized multiply-and-add operations

Reducing dynamic power consumption in arrays

Accelerated quantized multiply-and-add operations

Processing denormal numbers in FMA hardware

Calculation control indicator cache

Calculation control indicator cache

Split-path heuristic for performing a fused FMA operation

Subdivision of a fused compound arithmetic operation

Standard format intermediate result

Temporally split fused multiply-accumulate operation

Non-atomic split-path fused multiply-accumulate

Leading sign digit predictor for floating point near subtractor

Non-atomic scheduling of micro-operations to perform round instruction

Apparatus and method for optimizing the performance of x87 floating...

Method and apparatus for maintaining status coherency between queue...

Processor having vector processing capability and method for execut...

Patents Applicationslast 30 patents

SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...

MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY

TRIPLE ADDER

SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...

SYSTOLIC ARRAY WITH EFFICIENT INPUT REDUCTION AND EXTENDED ARRAY PE...

SYSTOLIC ARRAY WITH INPUT REDUCTION TO MULTIPLE REDUCED INPUTS

MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY

SYSTOLIC ARRAY COMPONENT COMBINING MULTIPLE INTEGER AND FLOATING-PO...

SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...

ACCELERATED QUANTIZED MULTIPLY-AND-ADD OPERATIONS

ACCELERATED QUANTIZED MULTIPLY-AND-ADD OPERATIONS

PROCESSING DENORMAL NUMBERS IN FMA HARDWARE

CHAINED SPLIT EXECUTION OF FUSED COMPOUND ARITHMETIC OPERATIONS

NON-ATOMIC SPLIT-PATH FUSED MULTIPLY-ACCUMULATE

STANDARD FORMAT INTERMEDIATE RESULT

SUBDIVISION OF A FUSED COMPOUND ARITHMETIC OPERATION

TEMPORALLY SPLIT FUSED MULTIPLY-ACCUMULATE OPERATION

SPLIT-PATH HEURISTIC FOR PERFORMING A FUSED FMA OPERATION

CALCULATION CONTROL INDICATOR CACHE

CALCULATION CONTROL INDICATOR CACHE

LEADING SIGN DIGIT PREDICTOR FOR FLOATING POINT NEAR SUBTRACTOR

NON-ATOMIC SCHEDULING OF MICRO-OPERATIONS TO PERFORM ROUND INSTRUCTION

APPARATUS AND METHOD FOR OPTIMIZING THE PERFORMANCE OF X87 FLOATING...

METHOD AND APPARATUS FOR MAINTAINING STATUS COHERENCY BETWEEN QUEUE...