Tomas Colunga

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Tempa, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for extending semiconductor chip testing with...
- Patent number 7,322,000
- Issue date Jan 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Tomas V. Colunga
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for incorporating IDDQ testing into logic BIST
- Patent number 7,272,767
- Issue date Sep 18, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Tomas V. Colunga
- G01 - MEASURING TESTING
Information Patent Grant
Logic circuit for reliability and yield enhancement
- Patent number 5,199,035
- Issue date Mar 30, 1993
- Motorola, Inc.
- David E. Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self test method for application specific integrated circu...
- Patent number 4,949,341
- Issue date Aug 14, 1990
- Motorola Inc.
- David E. Lopez
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Methods and apparatus for extending semiconductor chip testing with...
- Publication number 20060248419
- Publication date Nov 2, 2006
- Tomas V. Colunga
- G01 - MEASURING TESTING
Information Patent Application
Methods and apparatus for incorporating IDDQ testing into logic BIST
- Publication number 20060248424
- Publication date Nov 2, 2006
- Tomas V. Colunga
- G01 - MEASURING TESTING