Tomer Eliash

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Incomplete superblock management for memory systems
- Patent number 12,314,590
- Issue date May 27, 2025
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Underfill detection for memory systems
- Patent number 12,242,722
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting a memory write reliability risk without using a write ver...
- Patent number 12,106,812
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection for programming single level cells
- Patent number 12,067,255
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incomplete superblock management for memory systems
- Patent number 11,941,276
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory die with deep learning neural network
- Patent number 11,705,191
- Issue date Jul 18, 2023
- Western Digital Technologies, Inc.
- Rami Rom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sub-block programming mode with multi-tier block
- Patent number 11,664,075
- Issue date May 30, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient read of NAND with read disturb mitigation
- Patent number 11,600,343
- Issue date Mar 7, 2023
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative bit line biasing during quick pass write programming
- Patent number 11,475,958
- Issue date Oct 18, 2022
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced read-ahead capability for storage devices
- Patent number 11,449,428
- Issue date Sep 20, 2022
- Western Digital Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory apparatus and method of operation using plane dependent ramp...
- Patent number 11,386,968
- Issue date Jul 12, 2022
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array with write failure protection for multi-l...
- Patent number 11,288,011
- Issue date Mar 29, 2022
- Western Digital Technologies, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peak power reduction management in non-volatile storage by delaying...
- Patent number 11,226,772
- Issue date Jan 18, 2022
- SanDisk Technologies LLC
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thermal region tags and thermal region outlier detection
- Patent number 11,210,031
- Issue date Dec 28, 2021
- Western Digital Technologies, Inc.
- Evgeny Mekhanik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for finding a last good page in NAND open block
- Patent number 11,126,368
- Issue date Sep 21, 2021
- Western Digital Technologies, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical defect detection in an integrated memory assembly
- Patent number 11,114,178
- Issue date Sep 7, 2021
- Western Digital Technologies, Inc.
- Tomer Eliash
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for address table cache management based on corre...
- Patent number 10,997,080
- Issue date May 4, 2021
- Western Digital Technologies, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE POWER MODES USING MEMORY USAGE PATTERNS
- Publication number 20250224793
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Tomer Tzvi ELIASH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNDERFILL DETECTION FOR MEMORY SYSTEMS
- Publication number 20250156071
- Publication date May 15, 2025
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING AN ORDER OF PROGRAMMING OPERATIONS IN A MEMORY SUB-SYSTEM
- Publication number 20250085863
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS
- Publication number 20250044953
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G01 - MEASURING TESTING
Information Patent Application
SELECTIVELY ENABLING VALLEY TRACK FOR READING DATA
- Publication number 20240419332
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...
- Publication number 20240420783
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING PROGRAMMING OPERATION SEQUENCE IN A MEMORY SUB-SYSTEM
- Publication number 20240411449
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE HEALTH MONITORING AND DYNAMIC ADJUSTMENT OF DEVICE PA...
- Publication number 20240347127
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Dongxiang Liao
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING READ ERROR HANDLING OPERATIONS DURING POWER UP OF A MEMORY...
- Publication number 20240290413
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Dongxiang Liao
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM
- Publication number 20240248619
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM
- Publication number 20240231641
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM
- Publication number 20240203507
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE
- Publication number 20240194279
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G11 - INFORMATION STORAGE
Information Patent Application
INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS
- Publication number 20240192879
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...
- Publication number 20240055060
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS
- Publication number 20240036752
- Publication date Feb 1, 2024
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS
- Publication number 20240028214
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNDERFILL DETECTION FOR MEMORY SYSTEMS
- Publication number 20240020002
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUB-BLOCK PROGRAMMING MODE WITH MULTI-TIER BLOCK
- Publication number 20230069260
- Publication date Mar 2, 2023
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT READ OF NAND WITH READ DISTURB MITIGATION
- Publication number 20220383961
- Publication date Dec 1, 2022
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NEGATIVE BIT LINE BIASING DURING QUICK PASS WRITE PROGRAMMING
- Publication number 20220284965
- Publication date Sep 8, 2022
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY APPARATUS AND METHOD OF OPERATION USING PLANE DEPENDENT RAMP...
- Publication number 20220223214
- Publication date Jul 14, 2022
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
THERMAL REGION TAGS AND THERMAL REGION OUTLIER DETECTION
- Publication number 20220011967
- Publication date Jan 13, 2022
- Western Digital Technologies, Inc.
- Evgeny Mekhanik
- G01 - MEASURING TESTING
Information Patent Application
PEAK POWER REDUCTION MANAGEMENT IN NON-VOLATILE STORAGE BY DELAYING...
- Publication number 20210405920
- Publication date Dec 30, 2021
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY DIE WITH DEEP LEARNING NEURAL NETWORK
- Publication number 20210375358
- Publication date Dec 2, 2021
- Western Digital Technologies, Inc.
- Rami Rom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY ARRAY WITH WRITE FAILURE PROTECTION FOR MULTI-L...
- Publication number 20210303203
- Publication date Sep 30, 2021
- Western Digital Technologies, Inc.
- Tomer Tzvi Eliash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED READ-AHEAD CAPABILITY FOR STORAGE DEVICES
- Publication number 20200409852
- Publication date Dec 31, 2020
- Western Digital Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR FINDING A LAST GOOD PAGE IN NAND OPEN BLOCK
- Publication number 20200348880
- Publication date Nov 5, 2020
- Western Digital Technologies, Inc.
- Tomer Eliash
- G06 - COMPUTING CALCULATING COUNTING

Tomer Eliash

Person

Patents Grantslast 30 patents

Incomplete superblock management for memory systems

Underfill detection for memory systems

Detecting a memory write reliability risk without using a write ver...

Error detection for programming single level cells

Incomplete superblock management for memory systems

Non-volatile memory die with deep learning neural network

Sub-block programming mode with multi-tier block

Efficient read of NAND with read disturb mitigation

Negative bit line biasing during quick pass write programming

Enhanced read-ahead capability for storage devices

Memory apparatus and method of operation using plane dependent ramp...

Non-volatile memory array with write failure protection for multi-l...

Peak power reduction management in non-volatile storage by delaying...

Thermal region tags and thermal region outlier detection

Systems and methods for finding a last good page in NAND open block

Physical defect detection in an integrated memory assembly

Method and system for address table cache management based on corre...

Patents Applicationslast 30 patents

ADAPTIVE POWER MODES USING MEMORY USAGE PATTERNS

UNDERFILL DETECTION FOR MEMORY SYSTEMS

MANAGING AN ORDER OF PROGRAMMING OPERATIONS IN A MEMORY SUB-SYSTEM

ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS

SELECTIVELY ENABLING VALLEY TRACK FOR READING DATA

DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...

MANAGING PROGRAMMING OPERATION SEQUENCE IN A MEMORY SUB-SYSTEM

MEMORY DEVICE HEALTH MONITORING AND DYNAMIC ADJUSTMENT OF DEVICE PA...

REDUCING READ ERROR HANDLING OPERATIONS DURING POWER UP OF A MEMORY...

DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM

MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM

MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM

MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE

INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS

DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VER...

INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS

ERROR DETECTION FOR PROGRAMMING SINGLE LEVEL CELLS

UNDERFILL DETECTION FOR MEMORY SYSTEMS

SUB-BLOCK PROGRAMMING MODE WITH MULTI-TIER BLOCK

EFFICIENT READ OF NAND WITH READ DISTURB MITIGATION

NEGATIVE BIT LINE BIASING DURING QUICK PASS WRITE PROGRAMMING

MEMORY APPARATUS AND METHOD OF OPERATION USING PLANE DEPENDENT RAMP...

THERMAL REGION TAGS AND THERMAL REGION OUTLIER DETECTION

PEAK POWER REDUCTION MANAGEMENT IN NON-VOLATILE STORAGE BY DELAYING...

NON-VOLATILE MEMORY DIE WITH DEEP LEARNING NEURAL NETWORK

NON-VOLATILE MEMORY ARRAY WITH WRITE FAILURE PROTECTION FOR MULTI-L...

ENHANCED READ-AHEAD CAPABILITY FOR STORAGE DEVICES

SYSTEMS AND METHODS FOR FINDING A LAST GOOD PAGE IN NAND OPEN BLOCK