Tomoyoshi Ujii

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Tokyo, JP

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device, debug system, and debug method
- Patent number 12,253,561
- Issue date Mar 18, 2025
- Renesas Electronics Corporation
- Masahide Matsumoto
- G01 - MEASURING TESTING
Information Patent Grant
Debug apparatus and recording medium
- Patent number 11,899,564
- Issue date Feb 13, 2024
- Renesas Electronics Corporation
- Tomoyoshi Ujii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test access control for plural processors of an integrated circuit
- Patent number 7,743,278
- Issue date Jun 22, 2010
- Renesas Technology Corp.
- Yuri Ikeda
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE, DEBUG SYSTEM, AND DEBUG METHOD
- Publication number 20240168089
- Publication date May 23, 2024
- RENESAS ELECTRONICS CORPORATION
- Masahide MATSUMOTO
- G01 - MEASURING TESTING
Information Patent Application
DEBUG APPARATUS AND RECORDING MEDIUM
- Publication number 20230376402
- Publication date Nov 23, 2023
- RENESAS ELECTRONICS CORPORATION
- Tomoyoshi UJII
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit device
- Publication number 20070226558
- Publication date Sep 27, 2007
- RENESAS TECHNOLOGY CORP.
- Yuri Ikeda
- G01 - MEASURING TESTING