Tony Caviglia

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Marriottsville, MD, US

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Patents Grantslast 30 patents

Information Patent Grant
Time to digital converter with successive approximation architecture
- Patent number 9,285,778
- Issue date Mar 15, 2016
- Cadence Design Systems, Inc.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for augmenting frequency tuning resolution in L-C...
- Patent number 9,071,193
- Issue date Jun 30, 2015
- Cadence Design Systems, Inc.
- Anthony Caviglia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency adjustment in a control system
- Patent number 8,384,453
- Issue date Feb 26, 2013
- Cadence Design Systems, Inc.
- Anthony Louis Caviglia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with adaptive phase error compensation
- Patent number 7,579,886
- Issue date Aug 25, 2009
- Cadence Design Systems, Inc.
- Michael M. Hufford
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mechanism for maintaining relatively constant gain in a multi-compo...
- Patent number 6,377,091
- Issue date Apr 23, 2002
- Cadence Design Systems, Inc.
- Stephen T. Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock recovery circuit
- Patent number 6,002,279
- Issue date Dec 14, 1999
- G2 Networks, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PHASE LOCKED LOOP WITH ADAPTIVE PHASE ERROR COMPENSATION
- Publication number 20080136532
- Publication date Jun 12, 2008
- Cadence Design Systems, Inc.
- Michael M. HUFFORD
- H03 - BASIC ELECTRONIC CIRCUITRY