Tony M. Brewer

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Variable execution time atomic operations
- Patent number 12,367,148
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of notifying a process or programmable atomic operation traps
- Patent number 12,360,941
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread commencement using a work descriptor packet in a self-schedu...
- Patent number 12,360,773
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined write enable mask and credit return field
- Patent number 12,323,336
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Recall pending cache line eviction
- Patent number 12,321,274
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient processing of nested loops for computing device with mult...
- Patent number 12,293,187
- Issue date May 6, 2025
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network credit return mechanisms
- Patent number 12,277,081
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared virtual address spaces
- Patent number 12,277,065
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D stacked integrated circuits having functional blocks configured...
- Patent number 12,266,647
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual addresses for a memory system
- Patent number 12,242,385
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of organizing a programmable atomic unit instruction memory
- Patent number 12,236,120
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connectivity in coarse grained reconfigurable architecture
- Patent number 12,222,893
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System having a hybrid threading processor, a hybrid threading fabr...
- Patent number 12,204,363
- Issue date Jan 21, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for requesting atomic operations in a computing...
- Patent number 12,197,351
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Christopher Baronne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for configuring multiple input-output channels
- Patent number 12,190,987
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread priority management in a multi-threaded, self-scheduling pro...
- Patent number 12,182,622
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling reconfigurable computing fabric
- Patent number 12,182,048
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chained resource locking
- Patent number 12,182,635
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Patrick Estep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interpolation acceleration in a processor memory interface
- Patent number 12,174,759
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling processor
- Patent number 12,164,464
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single field for encoding multiple elements
- Patent number 12,155,570
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for providing logging for persistent memory
- Patent number 12,118,230
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine grained resource management for rollback memory operations
- Patent number 12,118,224
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronized request handling at a memory device
- Patent number 12,111,758
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Silent cache line eviction
- Patent number 12,111,770
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution or write mask generation for data selection in a multi-th...
- Patent number 12,106,099
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System call management in a user-mode, multi-threaded, self-schedul...
- Patent number 12,106,142
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host-preferred memory operation
- Patent number 12,079,516
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D stacked integrated circuits having failure management
- Patent number 12,074,599
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Grant
Thread creation on local or remote compute elements by a multi-thre...
- Patent number 12,067,418
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE CHANNEL MEMORY SYSTEM
- Publication number 20250225087
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND FENCING FOR MEMORY-BASED COMMUNICATION QUEUES
- Publication number 20250190376
- Publication date Jun 12, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL ADDRESSES FOR A MEMORY SYSTEM
- Publication number 20250193332
- Publication date Jun 12, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK CREDIT RETURN MECHANISMS
- Publication number 20250173292
- Publication date May 29, 2025
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINE-GRAINED DATA MOVER
- Publication number 20250156100
- Publication date May 15, 2025
- Micron Technology, Inc.
- Craig William Warner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT
- Publication number 20250158618
- Publication date May 15, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE
- Publication number 20250156370
- Publication date May 15, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF ORGANIZING A PROGRAMMABLE ATOMIC UNIT INSTRUCTION MEMORY
- Publication number 20250156098
- Publication date May 15, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D STACKED INTEGRATED CIRCUITS HAVING FUNCTIONAL BLOCKS CONFIGURED...
- Publication number 20250149531
- Publication date May 8, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZED COMMAND QUEUES WITH LOW LATENCY
- Publication number 20250117153
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Bryan Dale Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS
- Publication number 20250118343
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHAINED RESOURCE LOCKING
- Publication number 20250094242
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Patrick Estep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAILURE FAULT TOLERANCE IN DISTRIBUTED MEMORY SYSTEMS
- Publication number 20250077369
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Craig William Warner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
- Publication number 20250068572
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID CACHE COHERENCY
- Publication number 20250061059
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF SUBMITTING WORK TO FABRIC ATTACHED MEMORY
- Publication number 20250060912
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FABRIC FAULT TOLERANCE IN A CLUSTER USING AN RAID DESIGN
- Publication number 20250045161
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tony M. BREWER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CXL MODULE FAULT TOLERANCE USING RAID
- Publication number 20250045165
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tony M. BREWER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE FIELD FOR ENCODING MULTIPLE ELEMENTS
- Publication number 20250030635
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR PROVIDING LOGGING FOR PERSISTENT MEMORY
- Publication number 20250021258
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILENT CACHE LINE EVICTION
- Publication number 20250013575
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE
- Publication number 20250013562
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT
- Publication number 20240421823
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Application
Thread Creation on Local or Remote Compute Elements by a Multi-Thre...
- Publication number 20240403115
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST-PREFERRED MEMORY OPERATION
- Publication number 20240393983
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Side Cache Request Handling
- Publication number 20240378152
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST
- Publication number 20240330194
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...
- Publication number 20240332257
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Michael G. Placke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION
- Publication number 20240311084
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION
- Publication number 20240311149
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING

Tony M. Brewer

Person

Patents Grantslast 30 patents

Variable execution time atomic operations

Method of notifying a process or programmable atomic operation traps

Thread commencement using a work descriptor packet in a self-schedu...

Combined write enable mask and credit return field

Recall pending cache line eviction

Efficient processing of nested loops for computing device with mult...

Network credit return mechanisms

Shared virtual address spaces

3D stacked integrated circuits having functional blocks configured...

Virtual addresses for a memory system

Method of organizing a programmable atomic unit instruction memory

Connectivity in coarse grained reconfigurable architecture

System having a hybrid threading processor, a hybrid threading fabr...

Methods and systems for requesting atomic operations in a computing...

Method for configuring multiple input-output channels

Thread priority management in a multi-threaded, self-scheduling pro...

Multi-threaded, self-scheduling reconfigurable computing fabric

Chained resource locking

Interpolation acceleration in a processor memory interface

Multi-threaded, self-scheduling processor

Single field for encoding multiple elements

Method for providing logging for persistent memory

Fine grained resource management for rollback memory operations

Synchronized request handling at a memory device

Silent cache line eviction

Execution or write mask generation for data selection in a multi-th...

System call management in a user-mode, multi-threaded, self-schedul...

Host-preferred memory operation

3D stacked integrated circuits having failure management

Thread creation on local or remote compute elements by a multi-thre...

Patents Applicationslast 30 patents

MULTIPLE CHANNEL MEMORY SYSTEM

COMMAND FENCING FOR MEMORY-BASED COMMUNICATION QUEUES

VIRTUAL ADDRESSES FOR A MEMORY SYSTEM

NETWORK CREDIT RETURN MECHANISMS

FINE-GRAINED DATA MOVER

3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT

CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE

METHOD OF ORGANIZING A PROGRAMMABLE ATOMIC UNIT INSTRUCTION MEMORY

3D STACKED INTEGRATED CIRCUITS HAVING FUNCTIONAL BLOCKS CONFIGURED...

OPTIMIZED COMMAND QUEUES WITH LOW LATENCY

METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS

CHAINED RESOURCE LOCKING

FAILURE FAULT TOLERANCE IN DISTRIBUTED MEMORY SYSTEMS

INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE

HYBRID CACHE COHERENCY

METHOD OF SUBMITTING WORK TO FABRIC ATTACHED MEMORY

FABRIC FAULT TOLERANCE IN A CLUSTER USING AN RAID DESIGN

CXL MODULE FAULT TOLERANCE USING RAID

SINGLE FIELD FOR ENCODING MULTIPLE ELEMENTS

METHOD FOR PROVIDING LOGGING FOR PERSISTENT MEMORY

SILENT CACHE LINE EVICTION

SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE

3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT

Thread Creation on Local or Remote Compute Elements by a Multi-Thre...

HOST-PREFERRED MEMORY OPERATION

Memory Side Cache Request Handling

EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST

EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...

NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION

DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION