Tony M. Brewer

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Thread priority management in a multi-threaded, self-scheduling pro...
- Patent number 12,182,622
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling reconfigurable computing fabric
- Patent number 12,182,048
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chained resource locking
- Patent number 12,182,635
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Patrick Estep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interpolation acceleration in a processor memory interface
- Patent number 12,174,759
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling processor
- Patent number 12,164,464
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single field for encoding multiple elements
- Patent number 12,155,570
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for providing logging for persistent memory
- Patent number 12,118,230
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine grained resource management for rollback memory operations
- Patent number 12,118,224
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronized request handling at a memory device
- Patent number 12,111,758
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Silent cache line eviction
- Patent number 12,111,770
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution or write mask generation for data selection in a multi-th...
- Patent number 12,106,099
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System call management in a user-mode, multi-threaded, self-schedul...
- Patent number 12,106,142
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host-preferred memory operation
- Patent number 12,079,516
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D stacked integrated circuits having failure management
- Patent number 12,074,599
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Grant
Thread creation on local or remote compute elements by a multi-thre...
- Patent number 12,067,418
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control parameter address virtualization
- Patent number 12,039,201
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with programmable atomic operations
- Patent number 12,019,920
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Edge interface placements to enable chiplet rotation into multi-chi...
- Patent number 12,021,062
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Michael G. Placke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of executing programmable atomic unit resources within a mul...
- Patent number 12,020,062
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Evicting a cache line with pending control request
- Patent number 12,013,788
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing index update messages for memory-based communication queues
- Patent number 12,008,243
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Michael Keith Dugan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine grained resource management for rollback memory operations
- Patent number 11,995,332
- Issue date May 28, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting infinite loops in a programmable atomic transaction
- Patent number 11,989,556
- Issue date May 21, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packet arbitration for buffered packets in a network device
- Patent number 11,985,078
- Issue date May 14, 2024
- Micron Technology, Inc.
- Tony Brewer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network credit return mechanisms
- Patent number 11,966,345
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustment of load access size by a multi-threaded, self-scheduling...
- Patent number 11,966,741
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable execution time atomic operations
- Patent number 11,960,403
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-side cache directory-based request queue
- Patent number 11,960,768
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping high-speed, point-to-point interface channels to packet vir...
- Patent number 11,954,055
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- David Patrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recall pending cache line eviction
- Patent number 11,940,919
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT
- Publication number 20240421823
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G11 - INFORMATION STORAGE
Information Patent Application
Thread Creation on Local or Remote Compute Elements by a Multi-Thre...
- Publication number 20240403115
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST-PREFERRED MEMORY OPERATION
- Publication number 20240393983
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Side Cache Request Handling
- Publication number 20240378152
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST
- Publication number 20240330194
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...
- Publication number 20240332257
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Michael G. Placke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION
- Publication number 20240311084
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION
- Publication number 20240311149
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE EXECUTION TIME ATOMIC OPERATIONS
- Publication number 20240311306
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECALL PENDING CACHE LINE EVICTION
- Publication number 20240248846
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK CREDIT RETURN MECHANISMS
- Publication number 20240232111
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Having a Hybrid Threading Processor, a Hybrid Threading Fabr...
- Publication number 20240211265
- Publication date Jun 27, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power and Temperature Management for Functional Blocks Implemented...
- Publication number 20240213224
- Publication date Jun 27, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...
- Publication number 20240170453
- Publication date May 23, 2024
- Micron Technology, Inc.
- Michael G. Placke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW CLEAR FEATURES FOR MEMORY DEVICES AND ASSOCIATED METHODS AND SY...
- Publication number 20240161809
- Publication date May 16, 2024
- Lodestar Licensing Group LLC
- Miles S. Wiscombe
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING INDEX UPDATE MESSAGES FOR MEMORY-BASED COMMUNICATION QUEUES
- Publication number 20240143184
- Publication date May 2, 2024
- Micron Technology, Inc.
- Michael Keith Dugan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...
- Publication number 20240111538
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-SCHEDULING THREADS IN A PROGRAMMABLE ATOMIC UNIT
- Publication number 20240086200
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE
- Publication number 20240086355
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR M...
- Publication number 20240069795
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Michael Keith Dugan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE EXECUTION TIME ATOMIC OPERATIONS
- Publication number 20240070074
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SIDE CACHE REQUEST HANDLING
- Publication number 20240070077
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST
- Publication number 20240070082
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST-PREFERRED MEMORY OPERATION
- Publication number 20240069800
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF SUBMITTING WORK TO FABRIC ATTACHED MEMORY
- Publication number 20240069802
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-SIDE CACHE DIRECTORY-BASED REQUEST QUEUE
- Publication number 20240069801
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROL PARAMETER ADDRESS VIRTUALIZATION
- Publication number 20240069804
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECALL PENDING CACHE LINE EVICTION
- Publication number 20240070078
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILENT CACHE LINE EVICTION
- Publication number 20240070083
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUEUEING ASYNCHRONOUS EVENTS FOR ACCEPTANCE BY THREADS EXECUTING IN...
- Publication number 20240069984
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Christopher Baronne
- G06 - COMPUTING CALCULATING COUNTING

Tony M. Brewer

Person

Patents Grantslast 30 patents

Thread priority management in a multi-threaded, self-scheduling pro...

Multi-threaded, self-scheduling reconfigurable computing fabric

Chained resource locking

Interpolation acceleration in a processor memory interface

Multi-threaded, self-scheduling processor

Single field for encoding multiple elements

Method for providing logging for persistent memory

Fine grained resource management for rollback memory operations

Synchronized request handling at a memory device

Silent cache line eviction

Execution or write mask generation for data selection in a multi-th...

System call management in a user-mode, multi-threaded, self-schedul...

Host-preferred memory operation

3D stacked integrated circuits having failure management

Thread creation on local or remote compute elements by a multi-thre...

Control parameter address virtualization

Memory controller with programmable atomic operations

Edge interface placements to enable chiplet rotation into multi-chi...

Method of executing programmable atomic unit resources within a mul...

Evicting a cache line with pending control request

Reducing index update messages for memory-based communication queues

Fine grained resource management for rollback memory operations

Detecting infinite loops in a programmable atomic transaction

Packet arbitration for buffered packets in a network device

Network credit return mechanisms

Adjustment of load access size by a multi-threaded, self-scheduling...

Variable execution time atomic operations

Memory-side cache directory-based request queue

Mapping high-speed, point-to-point interface channels to packet vir...

Recall pending cache line eviction

Patents Applicationslast 30 patents

3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT

Thread Creation on Local or Remote Compute Elements by a Multi-Thre...

HOST-PREFERRED MEMORY OPERATION

Memory Side Cache Request Handling

EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST

EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...

NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION

DETECTING INFINITE LOOPS IN A PROGRAMMABLE ATOMIC TRANSACTION

VARIABLE EXECUTION TIME ATOMIC OPERATIONS

RECALL PENDING CACHE LINE EVICTION

NETWORK CREDIT RETURN MECHANISMS

System Having a Hybrid Threading Processor, a Hybrid Threading Fabr...

Power and Temperature Management for Functional Blocks Implemented...

EDGE INTERFACE PLACEMENTS TO ENABLE CHIPLET ROTATION INTO MULTI-CHI...

ROW CLEAR FEATURES FOR MEMORY DEVICES AND ASSOCIATED METHODS AND SY...

REDUCING INDEX UPDATE MESSAGES FOR MEMORY-BASED COMMUNICATION QUEUES

EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...

SELF-SCHEDULING THREADS IN A PROGRAMMABLE ATOMIC UNIT

CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE

ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR M...

VARIABLE EXECUTION TIME ATOMIC OPERATIONS

MEMORY SIDE CACHE REQUEST HANDLING

EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST

HOST-PREFERRED MEMORY OPERATION

METHOD OF SUBMITTING WORK TO FABRIC ATTACHED MEMORY

MEMORY-SIDE CACHE DIRECTORY-BASED REQUEST QUEUE

CONTROL PARAMETER ADDRESS VIRTUALIZATION

RECALL PENDING CACHE LINE EVICTION

SILENT CACHE LINE EVICTION

QUEUEING ASYNCHRONOUS EVENTS FOR ACCEPTANCE BY THREADS EXECUTING IN...