Toru Asano

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Omihachiman, JP

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for wordline redundancy control of memory in a...
- Patent number 7,423,921
- Issue date Sep 9, 2008
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method of word line decoding for deep pipelined memory
- Patent number 7,139,215
- Issue date Nov 21, 2006
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for generating memory access signals, and memo...
- Patent number 6,944,088
- Issue date Sep 13, 2005
- International Business Machines Corporation
- Toru Asano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch type sense amplifier method and apparatus
- Patent number 6,898,135
- Issue date May 24, 2005
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method of wordline/bitline redundancy control using s...
- Patent number 6,885,596
- Issue date Apr 26, 2005
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Subarray control and subarray cell access in a memory module
- Patent number 6,850,456
- Issue date Feb 1, 2005
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Method and Apparatus for Wordline Redundancy Control of Memory in a...
- Publication number 20080013388
- Publication date Jan 17, 2008
- IBM Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method of word line decoding for deep pipelined memory
- Publication number 20060098520
- Publication date May 11, 2006
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method of wordline/bitline redundancy control using s...
- Publication number 20040264265
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
SUBARRAY CONTROL AND SUBARRAY CELL ACCESS IN A MEMORY MODULE
- Publication number 20040264280
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Latch type sense amplifier method and apparatus
- Publication number 20040264276
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for generating memory access signals, and memo...
- Publication number 20040064674
- Publication date Apr 1, 2004
- International Business Machines Corporation
- Toru Asano
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Method and apparatus for wordline redundancy control of memory in a...

Apparatus and method of word line decoding for deep pipelined memory

Apparatus and method for generating memory access signals, and memo...

Latch type sense amplifier method and apparatus

Apparatus and method of wordline/bitline redundancy control using s...

Subarray control and subarray cell access in a memory module

Patents Applicationslast 30 patents

Method and Apparatus for Wordline Redundancy Control of Memory in a...

Apparatus and method of word line decoding for deep pipelined memory

Apparatus and method of wordline/bitline redundancy control using s...

SUBARRAY CONTROL AND SUBARRAY CELL ACCESS IN A MEMORY MODULE

Latch type sense amplifier method and apparatus

Apparatus and method for generating memory access signals, and memo...