Toshiaki Yoshino

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Two-stage entropy decoding
- Patent number 8,755,444
- Issue date Jun 17, 2014
- QUALCOMM Incorporated
- Jian Wei
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Architecture for multi-stage decoding of a CABAC bitstream
- Patent number 7,839,311
- Issue date Nov 23, 2010
- QUALCOMM Incorporated
- Yiliang Bao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for dynamic pipelining
- Patent number 6,643,329
- Issue date Nov 4, 2003
- NJR Corporation
- Qiong Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for bitstream decoding
- Patent number 6,459,738
- Issue date Oct 1, 2002
- NJR Corporation
- Qiong Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Motion estimation processor architecture for full search block matc...
- Patent number 5,696,836
- Issue date Dec 9, 1997
- LSI Logic Corporation
- Toshiaki Yoshino
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Computing device for nth degree functions
- Patent number 5,644,518
- Issue date Jul 1, 1997
- Texas Instruments Incorporated
- Hiroyuki Nishimura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Infinite impulse response digital filter with plural processing units
- Patent number 5,523,962
- Issue date Jun 4, 1996
- Texas Instruments Incorporated
- Toshiaki Yoshino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BICMOS tri-state circuit with full output voltage swing
- Patent number 5,446,321
- Issue date Aug 29, 1995
- Texas Instruments Incorporated
- Toshiaki Yoshino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelined Fast Fourier Transform (FFT) architecture
- Patent number 5,163,017
- Issue date Nov 10, 1992
- Texas Instruments Incorporated
- Yiwan Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for densely packing a complex multiplier
- Patent number 5,095,456
- Issue date Mar 10, 1992
- Texas Instruments Incorporated
- Yiwan Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast fourier transform (FFT) addressing apparatus and method
- Patent number 5,091,875
- Issue date Feb 25, 1992
- Texas Instruments Incorporated
- Yiwan Wong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TWO-STAGE ENTROPY DECODING
- Publication number 20120033742
- Publication date Feb 9, 2012
- QUALCOMM Incorporated
- JIAN WEI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ARCHITECTURE FOR MULTI-STAGE DECODING OF A CABAC BITSTREAM
- Publication number 20090058695
- Publication date Mar 5, 2009
- QUALCOMM Incorporated
- Yiliang Bao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Toshiaki Yoshino

Person

Patents Grantslast 30 patents

Two-stage entropy decoding

Architecture for multi-stage decoding of a CABAC bitstream

Method and apparatus for dynamic pipelining

Method and apparatus for bitstream decoding

Motion estimation processor architecture for full search block matc...

Computing device for nth degree functions

Infinite impulse response digital filter with plural processing units

BICMOS tri-state circuit with full output voltage swing

Pipelined Fast Fourier Transform (FFT) architecture

Method for densely packing a complex multiplier

Fast fourier transform (FFT) addressing apparatus and method

Patents Applicationslast 30 patents

TWO-STAGE ENTROPY DECODING

ARCHITECTURE FOR MULTI-STAGE DECODING OF A CABAC BITSTREAM