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Toshiyuki Morimoto
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Hyogo, JP
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Patents Grants
last 30 patents
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Patent Grant
Method of manufacturing compound semiconductor wafer
Patent number
7,078,343
Issue date
Jul 18, 2006
Sumitomo Electric Industries, Ltd.
Takatoshi Okamoto
B24 - GRINDING POLISHING
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Patent Grant
Method of making group III-V compound semiconductor wafer
Patent number
6,294,019
Issue date
Sep 25, 2001
Sumitomo Electric Industries, Ltd.
Yoshiki Miura
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
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Patent Application
Method of manufacturing compound semiconductor wafer
Publication number
20030104696
Publication date
Jun 5, 2003
Takatoshi Okamoto
B24 - GRINDING POLISHING