Toyokatsu Nakajima

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Microcomputer having an output circuit with a resistor ladder
- Patent number 5,966,086
- Issue date Oct 12, 1999
- Mitsubishi Electric Semiconductor Software Co., Ltd.
- Kenji Kubo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcomputer with two oscillators of different frequencies selecta...
- Patent number 5,907,699
- Issue date May 25, 1999
- Mitsubishi Denki Kabushiki Kaisha
- Toyokatsu Nakajima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcomputer including a circuit for generating a reset signal whe...
- Patent number 5,721,887
- Issue date Feb 24, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Toyokatsu Nakajima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcomputer having reduced power consumption through impedance co...
- Patent number 5,632,040
- Issue date May 20, 1997
- Mitsubishi Electric Semiconductor Software Co., Ltd.
- Toyokatsu Nakajima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-port memory with selective read data output prohibition
- Patent number 5,459,851
- Issue date Oct 17, 1995
- Mitsubishi Denki Kabushiki Kaisha
- Toyokatsu Nakajima
- G11 - INFORMATION STORAGE
Information Patent Grant
Comparison circuit
- Patent number 5,341,120
- Issue date Aug 23, 1994
- Mitsubishi Denki Kabushiki Kaisha
- Toyokatsu Nakajima
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor memory device and method of reading data therefrom
- Patent number 5,235,552
- Issue date Aug 10, 1993
- Mitsubishi Denki Kabushiki Kaisha
- Toyokatsu Nakajima
- G11 - INFORMATION STORAGE

Toyokatsu Nakajima

Person

Patents Grantslast 30 patents

Microcomputer having an output circuit with a resistor ladder

Microcomputer with two oscillators of different frequencies selecta...

Microcomputer including a circuit for generating a reset signal whe...

Microcomputer having reduced power consumption through impedance co...

Dual-port memory with selective read data output prohibition

Comparison circuit

Semiconductor memory device and method of reading data therefrom