Trevor Nigel MUDGE

Person

Ann Arbor, MI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamically allocating storage elements to provide registers for pr...
- Patent number 10,585,701
- Issue date Mar 10, 2020
- The Regents of the University of Michigan
- John Kloosterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error recovery within integrated circuit
- Patent number 10,579,463
- Issue date Mar 3, 2020
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error recovery within integrated circuit
- Patent number 10,572,334
- Issue date Feb 25, 2020
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable arithmetic unit
- Patent number 10,409,615
- Issue date Sep 10, 2019
- The Regents of the University of Michigan
- Yajing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for generating a selection signal to perform...
- Patent number 10,037,295
- Issue date Jul 31, 2018
- The Regents of the University of Michigan
- Supreet Jeloka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Enhanced memory device
- Patent number 10,002,657
- Issue date Jun 19, 2018
- The Regents of the University of Michigan
- Byoungchan Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing apparatus and method for decoding program instructi...
- Patent number 9,880,843
- Issue date Jan 30, 2018
- The Regents of the University of Michigan
- Joseph M Pusdesris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single cycle arbitration within an interconnect
- Patent number 9,514,074
- Issue date Dec 6, 2016
- The Regents of the University of Michigan
- Supreet Jeloka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Contention management for a hardware transactional memory
- Patent number 9,513,959
- Issue date Dec 6, 2016
- ARM Limited
- Stuart David Biles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus with memory rename table for mapping memo...
- Patent number 9,471,480
- Issue date Oct 18, 2016
- The Regents of the University of Michigan
- Joseph Michael Pusdesris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error recovery within integrated circuit
- Patent number 9,448,875
- Issue date Sep 20, 2016
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error recovery within integrated circuit
- Patent number 9,164,842
- Issue date Oct 20, 2015
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Next branch table for use with a branch predictor
- Patent number 9,135,011
- Issue date Sep 15, 2015
- The Regents of the University of Michigan
- David Thomas Manville
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Crossbar circuitry for applying an adaptive priority scheme and met...
- Patent number 8,868,817
- Issue date Oct 21, 2014
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- G11 - INFORMATION STORAGE
Information Patent Grant
Error recovery within integrated circuit
- Patent number 8,650,470
- Issue date Feb 11, 2014
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Crossbar circuitry for applying an adaptive priority scheme and met...
- Patent number 8,549,207
- Issue date Oct 1, 2013
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- G11 - INFORMATION STORAGE
Information Patent Grant
Error recover within processing stages of an integrated circuit
- Patent number 8,407,537
- Issue date Mar 26, 2013
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical interconnect patterns in multi-layer integrated circuits
- Patent number 8,381,155
- Issue date Feb 19, 2013
- The Regents of the University of Michigan
- David A. Fick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random number generator
- Patent number 8,346,832
- Issue date Jan 1, 2013
- The Regents of the University of Michigan
- Trevor Nigel Mudge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cache memory system for a data processing apparatus
- Patent number 8,335,122
- Issue date Dec 18, 2012
- The Regents of the University of Michigan
- Ronald George Dreslinski, Jr.
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Cache memory with power saving state
- Patent number 8,285,936
- Issue date Oct 9, 2012
- The Regents of the University of Michigan
- David Andrew Roberts
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Crossbar circuitry for applying a pre-selection prior to arbitratio...
- Patent number 8,255,610
- Issue date Aug 28, 2012
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- G11 - INFORMATION STORAGE
Information Patent Grant
Crossbar circuitry and method of operation of such crossbar circuitry
- Patent number 8,230,152
- Issue date Jul 24, 2012
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage of data in data stores having some faulty storage locations
- Patent number 8,230,277
- Issue date Jul 24, 2012
- ARM Limited
- Trevor Nigel Mudge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error recovery within processing stages of an integrated circuit
- Patent number 8,185,786
- Issue date May 22, 2012
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage of data in data stores having some faulty storage locations
- Patent number 8,145,960
- Issue date Mar 27, 2012
- ARM Limited
- Trevor Nigel Mudge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Crossbar circuitry and method of operation of such crossbar circuitry
- Patent number 8,108,585
- Issue date Jan 31, 2012
- The Regents of the Universtiy of Michigan
- Sudhir Kumar Satpathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with error correction mechanisms to offset narro...
- Patent number 7,701,240
- Issue date Apr 20, 2010
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and recovery within processing stages of an integra...
- Patent number 7,650,551
- Issue date Jan 19, 2010
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor memory circuit
- Patent number 7,533,226
- Issue date May 12, 2009
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR PROCESSING THREAD GROUPS
- Publication number 20190114205
- Publication date Apr 18, 2019
- The Regents of the University of Michigan
- John KLOOSTERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE ARITHMETIC UNIT
- Publication number 20180365021
- Publication date Dec 20, 2018
- The Regents of the University of Michigan
- Yajing Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Memory Device
- Publication number 20170278561
- Publication date Sep 28, 2017
- The Regents of the University of Michigan
- Byoungchan Oh
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE CYCLE ARBITRATION
- Publication number 20170083471
- Publication date Mar 23, 2017
- The Regents of the University of Michigan
- Supreet JELOKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Recovery within Integrated Circuit
- Publication number 20160378588
- Publication date Dec 29, 2016
- ARM Limited
- KRISZTIAN FLAUTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Recovery Within Integrated Circuit
- Publication number 20160034339
- Publication date Feb 4, 2016
- ARM Limited
- Krisztian FLAUTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING APPARATUS WITH MEMORY RENAME TABLE FOR MAPPING MEMO...
- Publication number 20150154106
- Publication date Jun 4, 2015
- The Regents of the University of Michigan
- Joseph Michael PUSDESRIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTENTION MANAGEMENT FOR A HARDWARE TRANSACTIONAL MEMORY
- Publication number 20150154045
- Publication date Jun 4, 2015
- ARM Limited
- Geoffrey Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR RECOVERY WITHIN INTEGRATED CIRCUIT
- Publication number 20140181581
- Publication date Jun 26, 2014
- The Regents of the University of Michigan
- Krisztian FLAUTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE CYCLE ARBITRATION
- Publication number 20140019655
- Publication date Jan 16, 2014
- Supreet Jeloka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR RECOVERY WITHIN INTEGRATED CIRCUIT
- Publication number 20140013178
- Publication date Jan 9, 2014
- The Regents of the University of Michigan
- Krisztian FLAUTNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEXT BRANCH TABLE FOR USE WITH A BRANCH PREDICTOR
- Publication number 20130290679
- Publication date Oct 31, 2013
- The Regents of the University of Michigan
- David Thomas Manville
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING APPARATUS AND METHOD FOR DECODING PROGRAM INSTRUCTI...
- Publication number 20130198487
- Publication date Aug 1, 2013
- The Regents of the University of Michigan
- Joseph M. PUSDESRIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITY ARBITRATION CONTROL WITHIN INTERCONNECT CIRCUITRY
- Publication number 20120254491
- Publication date Oct 4, 2012
- The Regents of the University of Michigan
- Sudhir Kumar SATPATHY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Crossbar circuitry for applying a pre-selection prior to arbitratio...
- Publication number 20120047310
- Publication date Feb 23, 2012
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Storage of data in data stores having some faulty storage locations
- Publication number 20110185260
- Publication date Jul 28, 2011
- Trevor Nigel Mudge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Crossbar circuitry for applying an adaptive priority scheme and met...
- Publication number 20110138098
- Publication date Jun 9, 2011
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Error recover within processing stages of an integrated circuit
- Publication number 20110126051
- Publication date May 26, 2011
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error recovery within integrated circuit
- Publication number 20110107166
- Publication date May 5, 2011
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory control
- Publication number 20110093654
- Publication date Apr 21, 2011
- The Regents of the University of Michigan
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error recovery within processing stages of an integrated circuit
- Publication number 20110093737
- Publication date Apr 21, 2011
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Crossbar circuitry and method of operation of such crossbar circuitry
- Publication number 20100211719
- Publication date Aug 19, 2010
- Sudhir Kumar SATPATHY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Crossbar circuitry and method of operation of such crossbar circuitry
- Publication number 20100211720
- Publication date Aug 19, 2010
- The Regents of the University of Michigan
- Sudhir Kumar Satpathy
- G11 - INFORMATION STORAGE
Information Patent Application
Cache memory system for a data processing apparatus
- Publication number 20090138658
- Publication date May 28, 2009
- The Regents of the University of Michigan
- Ronald George Dreslinski, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Contention management for a hardware transactional memory
- Publication number 20090138890
- Publication date May 28, 2009
- ARM Limited
- Geoffrey Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Contention management for a hardware transactional memory
- Publication number 20090133032
- Publication date May 21, 2009
- Stuart David Biles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Random number generator
- Publication number 20080091755
- Publication date Apr 17, 2008
- Trevor Nigel Mudge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage of data in data stores having some faulty storage locations
- Publication number 20080077824
- Publication date Mar 27, 2008
- Trevor Nigel Mudge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detection and recovery within processing stages of an integra...
- Publication number 20070288798
- Publication date Dec 13, 2007
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor memory circuit
- Publication number 20070022260
- Publication date Jan 25, 2007
- ARM Limited
- Krisztian Flautner
- G06 - COMPUTING CALCULATING COUNTING

Trevor Nigel MUDGE

Person

Patents Grantslast 30 patents

Dynamically allocating storage elements to provide registers for pr...

Error recovery within integrated circuit

Error recovery within integrated circuit

Configurable arithmetic unit

Apparatus and methods for generating a selection signal to perform...

Enhanced memory device

Data processing apparatus and method for decoding program instructi...

Single cycle arbitration within an interconnect

Contention management for a hardware transactional memory

Data processing apparatus with memory rename table for mapping memo...

Error recovery within integrated circuit

Error recovery within integrated circuit

Next branch table for use with a branch predictor

Crossbar circuitry for applying an adaptive priority scheme and met...

Error recovery within integrated circuit

Crossbar circuitry for applying an adaptive priority scheme and met...

Error recover within processing stages of an integrated circuit

Vertical interconnect patterns in multi-layer integrated circuits

Random number generator

Cache memory system for a data processing apparatus

Cache memory with power saving state

Crossbar circuitry for applying a pre-selection prior to arbitratio...

Crossbar circuitry and method of operation of such crossbar circuitry

Storage of data in data stores having some faulty storage locations

Error recovery within processing stages of an integrated circuit

Storage of data in data stores having some faulty storage locations

Crossbar circuitry and method of operation of such crossbar circuitry

Integrated circuit with error correction mechanisms to offset narro...

Error detection and recovery within processing stages of an integra...

Data processor memory circuit

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR PROCESSING THREAD GROUPS

CONFIGURABLE ARITHMETIC UNIT

Enhanced Memory Device

SINGLE CYCLE ARBITRATION

Error Recovery within Integrated Circuit

Error Recovery Within Integrated Circuit

DATA PROCESSING APPARATUS WITH MEMORY RENAME TABLE FOR MAPPING MEMO...

CONTENTION MANAGEMENT FOR A HARDWARE TRANSACTIONAL MEMORY

ERROR RECOVERY WITHIN INTEGRATED CIRCUIT

SINGLE CYCLE ARBITRATION

ERROR RECOVERY WITHIN INTEGRATED CIRCUIT

NEXT BRANCH TABLE FOR USE WITH A BRANCH PREDICTOR

DATA PROCESSING APPARATUS AND METHOD FOR DECODING PROGRAM INSTRUCTI...

PRIORITY ARBITRATION CONTROL WITHIN INTERCONNECT CIRCUITRY

Crossbar circuitry for applying a pre-selection prior to arbitratio...

Storage of data in data stores having some faulty storage locations

Crossbar circuitry for applying an adaptive priority scheme and met...

Error recover within processing stages of an integrated circuit

Error recovery within integrated circuit

Memory control

Error recovery within processing stages of an integrated circuit

Crossbar circuitry and method of operation of such crossbar circuitry

Crossbar circuitry and method of operation of such crossbar circuitry

Cache memory system for a data processing apparatus

Contention management for a hardware transactional memory

Contention management for a hardware transactional memory

Random number generator

Storage of data in data stores having some faulty storage locations

Error detection and recovery within processing stages of an integra...

Data processor memory circuit