Tryggve Fossum

Person

Northboro, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low energy consumption mantissa multiplication for floating point m...
- Patent number 10,402,168
- Issue date Sep 3, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware compilation and/or translation with fault detection and ro...
- Patent number 9,317,263
- Issue date Apr 19, 2016
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable multi-layer 2D-mesh routers
- Patent number 9,294,419
- Issue date Mar 22, 2016
- Intel Corporation
- William C. Hasenplaugh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distributed power management for multi-core processors
- Patent number 9,250,682
- Issue date Feb 2, 2016
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for heterogeneous chip multiprocessors via res...
- Patent number 8,924,690
- Issue date Dec 30, 2014
- Intel Corporation
- Tryggve Fossum
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Hardware compilation and/or translation with fault detection and ro...
- Patent number 8,893,094
- Issue date Nov 18, 2014
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Priority based throttling for power/performance quality of service
- Patent number 8,799,902
- Issue date Aug 5, 2014
- Intel Corporation
- Ramesh Kumar Illikkal
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Technique for controlling computing resources
- Patent number 8,769,201
- Issue date Jul 1, 2014
- Intel Corporation
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared cache performance
- Patent number 8,244,980
- Issue date Aug 14, 2012
- Intel Corporation
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for heterogeneous chip multiprocessors via res...
- Patent number 8,190,863
- Issue date May 29, 2012
- Intel Corporation
- Tryggve Fossum
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method, system, and apparatus for improving multi-core processor pe...
- Patent number 7,788,519
- Issue date Aug 31, 2010
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for improving multi-core processor pe...
- Patent number 7,392,414
- Issue date Jun 24, 2008
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for improving multi-core processor pe...
- Patent number 7,389,440
- Issue date Jun 17, 2008
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Converting merge buffer system-kill errors to process-kill errors
- Patent number 7,380,169
- Issue date May 27, 2008
- Intel Corporation
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of handling errors
- Patent number 7,370,231
- Issue date May 6, 2008
- Intel Corporation
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temporary halting of thread execution until monitoring of armed eve...
- Patent number 6,675,192
- Issue date Jan 6, 2004
- Hewlett-Packard Development Company, L.P.
- Joel S. Emer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to quiesce a portion of a simultaneous multith...
- Patent number 6,493,741
- Issue date Dec 10, 2002
- Compaq Information Technologies Group, L.P.
- Joel S. Emer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for intelligent multiple-probe cache allocation
- Patent number 5,829,051
- Issue date Oct 27, 1998
- Digital Equipment Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for translation of virtual to physical addresses by operatin...
- Patent number 5,349,651
- Issue date Sep 20, 1994
- Digital Equipment Corporation
- Ricky C. Hetherington
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit chip having primary and secondary random access...
- Patent number 5,285,323
- Issue date Feb 8, 1994
- Digital Equipment Corporation
- Ricky C. Hetherington
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheme for insuring data consistency between a plurality of cache m...
- Patent number 5,222,224
- Issue date Jun 22, 1993
- Digital Equipment Corporation
- Michael E. Flynn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for ordering and queueing multiple memory requ...
- Patent number 5,222,223
- Issue date Jun 22, 1993
- Digital Equipment Corporation
- David A. Webb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing and processing of memory access operations in multipr...
- Patent number 5,175,837
- Issue date Dec 29, 1992
- Digital Equipment Corporation
- Scott Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device for storing vector registers
- Patent number 5,168,573
- Issue date Dec 1, 1992
- Digital Equipment Corporation
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for arbitrating communication requests using multi-pass cont...
- Patent number 5,155,854
- Issue date Oct 13, 1992
- Digital Equipment Corporation
- Michael E. Flynn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for simultaneously decoding three operands in...
- Patent number 5,148,528
- Issue date Sep 15, 1992
- Digital Equipment Corporation
- David B. Fite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch prediction
- Patent number 5,142,634
- Issue date Aug 25, 1992
- Digital Equipment Corporation
- David B. Fite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for queuing individual read or write mask and generating res...
- Patent number 5,142,631
- Issue date Aug 25, 1992
- Digital Equipment Corporation
- John E. Murray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for resolving a variable number of potential m...
- Patent number 5,125,083
- Issue date Jun 23, 1992
- Digital Equipment Corporation
- David B. Fite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling faults of vector instructions cau...
- Patent number 5,113,521
- Issue date May 12, 1992
- Digital Equipment Corporation
- Francis X. McKeen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOW ENERGY CONSUMPTION MANTISSA MULTIPLICATION FOR FLOATING POINT M...
- Publication number 20180095728
- Publication date Apr 5, 2018
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...
- Publication number 20150046910
- Publication date Feb 12, 2015
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE MULTI-LAYER 2D-MESH ROUTERS
- Publication number 20150003281
- Publication date Jan 1, 2015
- William C. Hasenplaugh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DISTRIBUTED POWER MANAGEMENT FOR MULTI-CORE PROCESSORS
- Publication number 20140189413
- Publication date Jul 3, 2014
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...
- Publication number 20130173893
- Publication date Jul 4, 2013
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO IMPROVE UNALIGNED CACHE MEMORY ACCESSES
- Publication number 20120246407
- Publication date Sep 27, 2012
- WILLIAM C. HASENPLAUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR HETEROGENEOUS CHIP MULTIPROCESSORS VIA RES...
- Publication number 20120239875
- Publication date Sep 20, 2012
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for controlling computing resources
- Publication number 20100138609
- Publication date Jun 3, 2010
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Priority based throttling for power/performance Quality of Service
- Publication number 20080250415
- Publication date Oct 9, 2008
- Ramesh Kumar Illikkal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Shared cache performance
- Publication number 20070300016
- Publication date Dec 27, 2007
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR IMPROVING MULTI-CORE PROCESSOR PE...
- Publication number 20070198872
- Publication date Aug 23, 2007
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multicore processor having active and inactive execution cores
- Publication number 20060212677
- Publication date Sep 21, 2006
- Intel Corporation
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of handling errors
- Publication number 20060156153
- Publication date Jul 13, 2006
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for improving multi-core processor pe...
- Publication number 20060123263
- Publication date Jun 8, 2006
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for improving multi-core processor pe...
- Publication number 20060123264
- Publication date Jun 8, 2006
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for improving multi-core processor pe...
- Publication number 20060117200
- Publication date Jun 1, 2006
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for improving multi-core processor pe...
- Publication number 20060117199
- Publication date Jun 1, 2006
- Intel Corporation
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Converting merge buffer system-kill errors to process-kill errors
- Publication number 20060075301
- Publication date Apr 6, 2006
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for heterogeneous chip multiprocessors via res...
- Publication number 20060005082
- Publication date Jan 5, 2006
- Tryggve Fossum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for improving multi-core processor pe...
- Publication number 20050050310
- Publication date Mar 3, 2005
- Daniel W. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to quiesce a portion of a simultaneous multith...
- Publication number 20040073905
- Publication date Apr 15, 2004
- Joel S. Emer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to quiesce a portion of a simultaneous multith...
- Publication number 20030105944
- Publication date Jun 5, 2003
- Hewlett-Packard Development Company
- Joel S. Emer
- G06 - COMPUTING CALCULATING COUNTING

Tryggve Fossum

Person

Patents Grantslast 30 patents

Low energy consumption mantissa multiplication for floating point m...

Hardware compilation and/or translation with fault detection and ro...

Scalable multi-layer 2D-mesh routers

Distributed power management for multi-core processors

Apparatus and method for heterogeneous chip multiprocessors via res...

Hardware compilation and/or translation with fault detection and ro...

Priority based throttling for power/performance quality of service

Technique for controlling computing resources

Shared cache performance

Apparatus and method for heterogeneous chip multiprocessors via res...

Method, system, and apparatus for improving multi-core processor pe...

Method, system, and apparatus for improving multi-core processor pe...

Method, system, and apparatus for improving multi-core processor pe...

Converting merge buffer system-kill errors to process-kill errors

Method of handling errors

Temporary halting of thread execution until monitoring of armed eve...

Method and apparatus to quiesce a portion of a simultaneous multith...

Apparatus and method for intelligent multiple-probe cache allocation

System for translation of virtual to physical addresses by operatin...

Integrated circuit chip having primary and secondary random access...

Scheme for insuring data consistency between a plurality of cache m...

Method and apparatus for ordering and queueing multiple memory requ...

Synchronizing and processing of memory access operations in multipr...

Memory device for storing vector registers

System for arbitrating communication requests using multi-pass cont...

Method and apparatus for simultaneously decoding three operands in...

Branch prediction

System for queuing individual read or write mask and generating res...

Method and apparatus for resolving a variable number of potential m...

Method and apparatus for handling faults of vector instructions cau...

Patents Applicationslast 30 patents

LOW ENERGY CONSUMPTION MANTISSA MULTIPLICATION FOR FLOATING POINT M...

HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...

SCALABLE MULTI-LAYER 2D-MESH ROUTERS

DISTRIBUTED POWER MANAGEMENT FOR MULTI-CORE PROCESSORS

HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...

METHOD AND SYSTEM TO IMPROVE UNALIGNED CACHE MEMORY ACCESSES

APPARATUS AND METHOD FOR HETEROGENEOUS CHIP MULTIPROCESSORS VIA RES...

Technique for controlling computing resources

Priority based throttling for power/performance Quality of Service

Shared cache performance

METHOD, SYSTEM, AND APPARATUS FOR IMPROVING MULTI-CORE PROCESSOR PE...

Multicore processor having active and inactive execution cores

Method of handling errors

Method, system, and apparatus for improving multi-core processor pe...

Method, system, and apparatus for improving multi-core processor pe...

Method, system, and apparatus for improving multi-core processor pe...

Method, system, and apparatus for improving multi-core processor pe...

Converting merge buffer system-kill errors to process-kill errors

Apparatus and method for heterogeneous chip multiprocessors via res...

Method, system, and apparatus for improving multi-core processor pe...

Method and apparatus to quiesce a portion of a simultaneous multith...

Method and apparatus to quiesce a portion of a simultaneous multith...