Tsun Y. Ng

Person

Orange, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cluster-based cache memory allocation
- Patent number 6,996,669
- Issue date Feb 7, 2006
- Western Digital Technologies, Inc.
- Quoc N. Dang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Range-based cache control system and method
- Patent number 6,880,043
- Issue date Apr 12, 2005
- Western Digital Technologies, Inc.
- Ralph H. Castro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag memory disk cache architecture
- Patent number 6,862,660
- Issue date Mar 1, 2005
- Western Digital Technologies, Inc.
- Virgil V. Wilkins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache control system and method having hardware-based tag record al...
- Patent number 6,725,329
- Issue date Apr 20, 2004
- Western Digital Technologies, Inc.
- Tsun Y. Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cluster-based cache memory allocation
- Patent number 6,606,682
- Issue date Aug 12, 2003
- Western Digital Technologies, Inc.
- Quoc N. Dang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Range-based cache control system and method
- Patent number 6,601,137
- Issue date Jul 29, 2003
- Western Digital Technologies, Inc.
- Ralph H. Castro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag memory disk cache architecture
- Patent number 6,553,457
- Issue date Apr 22, 2003
- Western Digital Technologies, Inc.
- Virgil V. Wilkins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth code/data access using slow memory
- Patent number 6,175,893
- Issue date Jan 16, 2001
- Western Digital Corporation
- Kenneth J. D'Souza
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Cluster-based cache memory allocation

Range-based cache control system and method

Tag memory disk cache architecture

Cache control system and method having hardware-based tag record al...

Cluster-based cache memory allocation

Range-based cache control system and method

Tag memory disk cache architecture

High bandwidth code/data access using slow memory