Tsuwei Ku

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for data path cluster optimization
- Patent number 8,935,651
- Issue date Jan 13, 2015
- Cadence Design Systems, Inc.
- Tsuwei Ku
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physically aware logic synthesis of integrated circuit designs
- Patent number 8,782,591
- Issue date Jul 15, 2014
- Cadence Design Systems, Inc.
- Tsuwei Ku
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Library Design and Co-optimization with a Circuit Design
- Publication number 20220318475
- Publication date Oct 6, 2022
- Synopsys, Inc.
- Van Edward Morgan
- G06 - COMPUTING CALCULATING COUNTING