Tung-Sheng CHEN

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for rounded ONO formation in a flash memory de...
- Patent number 9,564,331
- Issue date Feb 7, 2017
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge rounded field effect transistors and methods of manufacturing
- Patent number 9,412,598
- Issue date Aug 9, 2016
- Cypress Semiconductor Corporation
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned NAND flash select-gate wordlines for spacer double pat...
- Patent number 8,874,253
- Issue date Oct 28, 2014
- Spansion LLC
- Tung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to improve charge trap flash memory core cell performance an...
- Patent number 8,835,277
- Issue date Sep 16, 2014
- Spansion LLC
- Tung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned NAND flash select-gate wordlines for spacer double pat...
- Patent number 8,461,053
- Issue date Jun 11, 2013
- Spansion LLC
- Tung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory with extended charge trapping layer
- Patent number 8,441,063
- Issue date May 14, 2013
- Spansion LLC
- Shenqing Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process margin engineering in charge trapping field effect transistors
- Patent number 8,263,458
- Issue date Sep 11, 2012
- Spansion LLC
- Tung-Sheng Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method to Improve Charge Trap Flash Memory Top Oxide Quality
- Publication number 20150255480
- Publication date Sep 10, 2015
- SPANSION LLC
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to Improve Charge Trap Flash Memory Core Cell Performance an...
- Publication number 20150035044
- Publication date Feb 5, 2015
- SPANSION LLC
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming a Substantially Uniform Wing Height Among Elements in a Cha...
- Publication number 20140148009
- Publication date May 29, 2014
- SPANSION LLC
- Angela Tai Hui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to Improve Charge Trap Flash Memory Core Cell Performance an...
- Publication number 20140141591
- Publication date May 22, 2014
- SPANSION LLC
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR ROUNDED ONO FORMATION IN A FLASH MEMORY DE...
- Publication number 20140001534
- Publication date Jan 2, 2014
- Shenqing FANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED NAND FLASH SELECT-GATE WORDLINES FOR SPACER DOUBLE PAT...
- Publication number 20130316537
- Publication date Nov 28, 2013
- SPANSION LLC
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH EXTENDED CHARGE TRAPPING LAYER
- Publication number 20120168847
- Publication date Jul 5, 2012
- Shenqing FANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED NAND FLASH SELECT-GATE WORDLINES FOR SPACER DOUBLE PAT...
- Publication number 20120156876
- Publication date Jun 21, 2012
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE ROUNDED FIELD EFFECT TRANSISTORS AND METHODS OF MANUFACTURING
- Publication number 20120153377
- Publication date Jun 21, 2012
- Shenqing FANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS MARGIN ENGINEERING IN CHARGE TRAPPING FIELD EFFECT TRANSISTORS
- Publication number 20120156856
- Publication date Jun 21, 2012
- Tung-Sheng CHEN
- H01 - BASIC ELECTRIC ELEMENTS

Tung-Sheng CHEN

Person

Patents Grantslast 30 patents

Apparatus and method for rounded ONO formation in a flash memory de...

Edge rounded field effect transistors and methods of manufacturing

Self-aligned NAND flash select-gate wordlines for spacer double pat...

Method to improve charge trap flash memory core cell performance an...

Self-aligned NAND flash select-gate wordlines for spacer double pat...

Memory with extended charge trapping layer

Process margin engineering in charge trapping field effect transistors

Patents Applicationslast 30 patents

Method to Improve Charge Trap Flash Memory Top Oxide Quality

Method to Improve Charge Trap Flash Memory Core Cell Performance an...

Forming a Substantially Uniform Wing Height Among Elements in a Cha...

Method to Improve Charge Trap Flash Memory Core Cell Performance an...

APPARATUS AND METHOD FOR ROUNDED ONO FORMATION IN A FLASH MEMORY DE...

SELF-ALIGNED NAND FLASH SELECT-GATE WORDLINES FOR SPACER DOUBLE PAT...

MEMORY WITH EXTENDED CHARGE TRAPPING LAYER

SELF-ALIGNED NAND FLASH SELECT-GATE WORDLINES FOR SPACER DOUBLE PAT...

EDGE ROUNDED FIELD EFFECT TRANSISTORS AND METHODS OF MANUFACTURING

PROCESS MARGIN ENGINEERING IN CHARGE TRAPPING FIELD EFFECT TRANSISTORS