Tuong Trieu

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for dedicating cache entries to certain stream...
- Patent number 7,797,492
- Issue date Sep 14, 2010
- Anoop Mukker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized memory addressing
- Patent number 7,612,780
- Issue date Nov 3, 2009
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized memory addressing
- Patent number 7,230,627
- Issue date Jun 12, 2007
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Queue partitioning mechanism
- Patent number 7,180,520
- Issue date Feb 20, 2007
- Intel Corporation
- Sarath Kotamreddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deterministic shut down of memory devices in response to a system w...
- Patent number 7,181,605
- Issue date Feb 20, 2007
- Intel Corporation
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for improving read latency for processor to sy...
- Patent number 6,629,217
- Issue date Sep 30, 2003
- Intel Corporation
- Steve J. Clohset
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arbitration mechanism for a computer system having a unified memory...
- Patent number 6,330,646
- Issue date Dec 11, 2001
- Intel Corporation
- Steve J. Clohset
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Abort of DRAM read ahead when PCI read multiple has ended
- Patent number 6,314,472
- Issue date Nov 6, 2001
- Intel Corporation
- Tuong P. Trieu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding deadlock by storing non-posted transactions in an auxiliar...
- Patent number 6,243,781
- Issue date Jun 5, 2001
- Intel Corporation
- Wishwesh Gandhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding livelock when performing a long stream of transactions
- Patent number 6,237,055
- Issue date May 22, 2001
- Intel Corporation
- Tuong Trieu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output buffer with current paths having different current carrying...
- Patent number 5,926,651
- Issue date Jul 20, 1999
- Intel Corporation
- Robert J. Johnston
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock rate compensation for a low frequency slave device
- Patent number 5,925,135
- Issue date Jul 20, 1999
- Intel Corporation
- Tuong Trieu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address shadow feature and methods of using the same
- Patent number 5,898,859
- Issue date Apr 27, 1999
- Intel Corporation
- James P. Kardach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Optimized memory addressing
- Publication number 20070188508
- Publication date Aug 16, 2007
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for open loop buffer allocation
- Publication number 20050198459
- Publication date Sep 8, 2005
- General Electric Company
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized memory addressing
- Publication number 20050195202
- Publication date Sep 8, 2005
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Queue partitioning mechanism
- Publication number 20050195201
- Publication date Sep 8, 2005
- Sarath Kotamreddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and a method to adjust signal timing on a memory interface
- Publication number 20050190193
- Publication date Sep 1, 2005
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for dedicating cache entries to certain stream...
- Publication number 20050188156
- Publication date Aug 25, 2005
- Anoop Mukker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Deterministic shut down of memory devices in response to a system w...
- Publication number 20050091481
- Publication date Apr 28, 2005
- Zohar Bogin
- G06 - COMPUTING CALCULATING COUNTING

Tuong Trieu

Person

Patents Grantslast 30 patents

Method and apparatus for dedicating cache entries to certain stream...

Optimized memory addressing

Optimized memory addressing

Queue partitioning mechanism

Deterministic shut down of memory devices in response to a system w...

Method and apparatus for improving read latency for processor to sy...

Arbitration mechanism for a computer system having a unified memory...

Abort of DRAM read ahead when PCI read multiple has ended

Avoiding deadlock by storing non-posted transactions in an auxiliar...

Avoiding livelock when performing a long stream of transactions

Output buffer with current paths having different current carrying...

Clock rate compensation for a low frequency slave device

Address shadow feature and methods of using the same

Patents Applicationslast 30 patents

Optimized memory addressing

Apparatus and method for open loop buffer allocation

Optimized memory addressing

Queue partitioning mechanism

Apparatus and a method to adjust signal timing on a memory interface

Method and apparatus for dedicating cache entries to certain stream...

Deterministic shut down of memory devices in response to a system w...