Tze-hsiang Chao

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Impedance calibration circuit and method
- Patent number 12,244,282
- Issue date Mar 4, 2025
- M31 Technology Corporation
- Ming-Yen Tsai
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for clock switching
- Patent number 7,411,429
- Issue date Aug 12, 2008
- Silicon Integrated Systems Corp.
- Chia-hao Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tile-based routing method of a multi-layer circuit board and relate...
- Patent number 7,208,403
- Issue date Apr 24, 2007
- Silicon Integrated Systems Corp.
- Chung-Yi Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method of controlling and tuning a fine calibration f...
- Patent number 7,202,716
- Issue date Apr 10, 2007
- Silicon Integrated Systems Corp.
- Tze-hsiang Chao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method of controlling clock phase alignment with dual...
- Patent number 7,183,821
- Issue date Feb 27, 2007
- Silicon Integrated Systems Corp.
- Tze-hsiang Chao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Tile-based routing method of a multi-layer circuit board
- Patent number 7,043,828
- Issue date May 16, 2006
- Silicon Integrated Systems Corp.
- Chung-Yi Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-stage delay clock generator
- Patent number 7,034,589
- Issue date Apr 25, 2006
- Silicon Integrated Systems Corp.
- Tze-Hsiang Chao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT AND METHOD
- Publication number 20250119121
- Publication date Apr 10, 2025
- M31 TECHNOLOGY CORPORATION
- MING-YEN TSAI
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT AND METHOD
- Publication number 20240305275
- Publication date Sep 12, 2024
- M31 TECHNOLOGY CORPORATION
- MING-YEN TSAI
- G11 - INFORMATION STORAGE
Information Patent Application
Conductive structure for electronic device
- Publication number 20070241456
- Publication date Oct 18, 2007
- SILICON INTEGRATED SYSTEMS CORP.
- Tze-Hsiang Chao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for clock switching
- Publication number 20070096774
- Publication date May 3, 2007
- SILICON INTEGRATED SYSTEMS CORP.
- Chia-hao Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD OF CONTROLLING AND TUNING A FINE CALIBRATION F...
- Publication number 20070090862
- Publication date Apr 26, 2007
- SILICON INTEGRATED SYSTEMS CORP.
- Tze-hsiang Chao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATE...
- Publication number 20060154402
- Publication date Jul 13, 2006
- Chung-Yi Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A MULTI-STAGE DELAY CLOCK GENERATOR
- Publication number 20050189974
- Publication date Sep 1, 2005
- Tze-Hsiang Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATE...
- Publication number 20040255457
- Publication date Dec 23, 2004
- Chung-Yi Fang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Quasi-synchronous multi-stage event synchronization apparatus
- Publication number 20040057548
- Publication date Mar 25, 2004
- Silicon Integrated System Corp.
- Jen-Pin Su
- G06 - COMPUTING CALCULATING COUNTING

Tze-hsiang Chao

Person

Patents Grantslast 30 patents

Impedance calibration circuit and method

System and method for clock switching

Tile-based routing method of a multi-layer circuit board and relate...

Apparatus and method of controlling and tuning a fine calibration f...

Apparatus and method of controlling clock phase alignment with dual...

Tile-based routing method of a multi-layer circuit board

Multi-stage delay clock generator

Patents Applicationslast 30 patents

IMPEDANCE CALIBRATION CIRCUIT AND METHOD

IMPEDANCE CALIBRATION CIRCUIT AND METHOD

Conductive structure for electronic device

System and method for clock switching

APPARATUS AND METHOD OF CONTROLLING AND TUNING A FINE CALIBRATION F...

TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATE...

A MULTI-STAGE DELAY CLOCK GENERATOR

TILE-BASED ROUTING METHOD OF A MULTI-LAYER CIRCUIT BOARD AND RELATE...

Quasi-synchronous multi-stage event synchronization apparatus