Ujval J. Kapasi

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hierarchical packing of syntax elements
- Patent number 12,170,765
- Issue date Dec 17, 2024
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical packing of syntax elements
- Patent number 11,665,342
- Issue date May 30, 2023
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Automated methods for conversions to a lower precision data format
- Patent number 10,997,492
- Issue date May 4, 2021
- NVIDIA Corporation
- Szymon Migacz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical packing of syntax elements
- Patent number 10,841,579
- Issue date Nov 17, 2020
- OL Security Limited Liability
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical packing of syntax elements
- Patent number 9,667,962
- Issue date May 30, 2017
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical packing of syntax elements
- Patent number 8,861,611
- Issue date Oct 14, 2014
- Calos Fund Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Chaining image-processing functions on a SIMD processor
- Patent number 8,786,614
- Issue date Jul 22, 2014
- Calos Fund Limited Liability Company
- Donald James Curry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for chaining image-processing functions on a SIMD processor
- Patent number 8,456,480
- Issue date Jun 4, 2013
- Calos Fund Limited Liability Company
- Donald James Curry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data exchange and communication between execution units in a parall...
- Patent number 8,412,917
- Issue date Apr 2, 2013
- Calos Fund Limited Liability Company
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Video coding on parallel processing systems
- Patent number 8,213,509
- Issue date Jul 3, 2012
- Calos Fund Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data exchange and communication between execution units in a parall...
- Patent number 8,024,553
- Issue date Sep 20, 2011
- Calos Fund Limited Liability Company
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction-parallel processor with zero-performance-overhead opera...
- Patent number 7,669,041
- Issue date Feb 23, 2010
- Stream Processors, Inc.
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIERARCHICAL PACKING OF SYNTAX ELEMENTS
- Publication number 20230247197
- Publication date Aug 3, 2023
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIERARCHICAL PACKING OF SYNTAX ELEMENTS
- Publication number 20210281839
- Publication date Sep 9, 2021
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTOMATED METHODS FOR CONVERSIONS TO A LOWER PRECISION DATA FORMAT
- Publication number 20210256348
- Publication date Aug 19, 2021
- NVIDIA Corporation
- Szymon Migacz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED METHODS FOR CONVERSIONS TO A LOWER PRECISION DATA FORMAT
- Publication number 20180211152
- Publication date Jul 26, 2018
- NVIDIA Corporation
- Szymon Migacz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL PACKING OF SYNTAX ELEMENTS
- Publication number 20170264899
- Publication date Sep 14, 2017
- OL Security Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIERARCHICAL PACKING OF SYNTAX ELEMENTS
- Publication number 20150030076
- Publication date Jan 29, 2015
- Calos Fund Limited Liability Company
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHAINING IMAGE-PROCESSING FUNCTIONS ON A SIMD PROCESSOR
- Publication number 20130241940
- Publication date Sep 19, 2013
- Calos Fund Limited Liability Company
- Donald James Curry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA EXCHANGE AND COMMUNICATION BETWEEN EXECUTION UNITS IN A PARALL...
- Publication number 20120011349
- Publication date Jan 12, 2012
- Calos Fund Limited Liability Company
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CHAINING IMAGE-PROCESSING FUNCTIONS ON A SIMD PROCESSOR
- Publication number 20100315428
- Publication date Dec 16, 2010
- Donald James Curry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL PACKING OF SYNTAX ELEMENTS
- Publication number 20090003453
- Publication date Jan 1, 2009
- Ujval J. Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA EXCHANGE AND COMMUNICATION BETWEEN EXECUTION UNITS IN A PARALL...
- Publication number 20080307207
- Publication date Dec 11, 2008
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION-PARALLEL PROCESSOR WITH ZERO-PERFORMANCE-OVERHEAD OPERA...
- Publication number 20080270750
- Publication date Oct 30, 2008
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data-Parallel processing unit
- Publication number 20080140994
- Publication date Jun 12, 2008
- Brucek Khailany
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Video coding on parallel processing systems
- Publication number 20080117978
- Publication date May 22, 2008
- Ujval Kapasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Ujval J. Kapasi

Person

Patents Grantslast 30 patents

Hierarchical packing of syntax elements

Hierarchical packing of syntax elements

Automated methods for conversions to a lower precision data format

Hierarchical packing of syntax elements

Hierarchical packing of syntax elements

Hierarchical packing of syntax elements

Chaining image-processing functions on a SIMD processor

Method for chaining image-processing functions on a SIMD processor

Data exchange and communication between execution units in a parall...

Video coding on parallel processing systems

Data exchange and communication between execution units in a parall...

Instruction-parallel processor with zero-performance-overhead opera...

Patents Applicationslast 30 patents

HIERARCHICAL PACKING OF SYNTAX ELEMENTS

HIERARCHICAL PACKING OF SYNTAX ELEMENTS

AUTOMATED METHODS FOR CONVERSIONS TO A LOWER PRECISION DATA FORMAT

AUTOMATED METHODS FOR CONVERSIONS TO A LOWER PRECISION DATA FORMAT

HIERARCHICAL PACKING OF SYNTAX ELEMENTS

HIERARCHICAL PACKING OF SYNTAX ELEMENTS

CHAINING IMAGE-PROCESSING FUNCTIONS ON A SIMD PROCESSOR

DATA EXCHANGE AND COMMUNICATION BETWEEN EXECUTION UNITS IN A PARALL...

METHOD FOR CHAINING IMAGE-PROCESSING FUNCTIONS ON A SIMD PROCESSOR

HIERARCHICAL PACKING OF SYNTAX ELEMENTS

DATA EXCHANGE AND COMMUNICATION BETWEEN EXECUTION UNITS IN A PARALL...

INSTRUCTION-PARALLEL PROCESSOR WITH ZERO-PERFORMANCE-OVERHEAD OPERA...

Data-Parallel processing unit

Video coding on parallel processing systems