Ulrich Moehlmann

Person

Moisburg, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Feedback system monitoring
- Patent number 12,063,045
- Issue date Aug 13, 2024
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle detector self-testing
- Patent number 11,815,553
- Issue date Nov 14, 2023
- NXP USA, INC.
- Cristian Pavao Moreira
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method of controlling frequency of a digitally controlle...
- Patent number 11,817,869
- Issue date Nov 14, 2023
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock frequency monitoring for a phase-locked loop based design
- Patent number 11,689,206
- Issue date Jun 27, 2023
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fractional-N ADPLL with reference dithering
- Patent number 11,658,666
- Issue date May 23, 2023
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable built-in self-test for an all digital phase locked loop
- Patent number 11,218,153
- Issue date Jan 4, 2022
- NXP B.V.
- Ulrich Moehlmann
- G01 - MEASURING TESTING
Information Patent Grant
All digital phase locked loop (ADPLL) with frequency locked loop
- Patent number 10,826,505
- Issue date Nov 3, 2020
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with phase and frequency lock detection
- Patent number 10,778,233
- Issue date Sep 15, 2020
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-testing of a phase-locked loop using a pseudo-random noise
- Patent number 10,396,974
- Issue date Aug 27, 2019
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loops
- Patent number 10,382,045
- Issue date Aug 13, 2019
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with lock/unlock detector
- Patent number 10,187,069
- Issue date Jan 22, 2019
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with reduced noise
- Patent number 9,893,876
- Issue date Feb 13, 2018
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop with lock detector
- Patent number 9,614,536
- Issue date Apr 4, 2017
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
All-digital phase-locked loop (ADPLL) with reduced settling time
- Patent number 9,337,850
- Issue date May 10, 2016
- NXP, B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sigma delta modulator
- Patent number 8,462,032
- Issue date Jun 11, 2013
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit arrangement and method for locking onto and/or processing d...
- Patent number 7,868,949
- Issue date Jan 11, 2011
- Trident Microsystems (Far East) Ltd.
- Ulrich Moehlmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit arrangement, in particular phase-locked loop, as well as co...
- Patent number 7,557,623
- Issue date Jul 7, 2009
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Arrangement for generating a decoder clock signal
- Patent number 7,221,726
- Issue date May 22, 2007
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ANALOG PHASE SELECTION TEST SYSTEM
- Publication number 20240085476
- Publication date Mar 14, 2024
- NXP B.V.
- Andreas Johannes Köllmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD OF CONTROLLING FREQUENCY OF A DIGITALLY CONTROLLE...
- Publication number 20230299777
- Publication date Sep 21, 2023
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RADAR SYSTEM
- Publication number 20220365173
- Publication date Nov 17, 2022
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FEEDBACK SYSTEM MONITORING
- Publication number 20220187423
- Publication date Jun 16, 2022
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUTY CYCLE DETECTOR SELF-TESTING
- Publication number 20210389372
- Publication date Dec 16, 2021
- NXP USA, Inc.
- Cristian Pavao Moreira
- G01 - MEASURING TESTING
Information Patent Application
PHASE LOCKED LOOP WITH LOCK/UNLOCK DETECTOR
- Publication number 20170366192
- Publication date Dec 21, 2017
- NXP B.V.
- Ulrich MÖEHLMANN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital Phase Locked Loops
- Publication number 20170194973
- Publication date Jul 6, 2017
- NXP B.V.
- Ulrich Moehlmann
- G01 - MEASURING TESTING
Information Patent Application
PHASE LOCKED LOOP WITH LOCK DETECTOR
- Publication number 20160344396
- Publication date Nov 24, 2016
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE LOCKED LOOP WITH REDUCED NOISE
- Publication number 20160344538
- Publication date Nov 24, 2016
- NXP B.V.
- Ulrich Moehlmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL) WITH REDUCED SETTLING TIME
- Publication number 20160036454
- Publication date Feb 4, 2016
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGMA DELTA MODULATOR
- Publication number 20110234437
- Publication date Sep 29, 2011
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit Arrangement and Method for Locking onto and/or Processing D...
- Publication number 20090244375
- Publication date Oct 1, 2009
- Koninklijke Philips Electronics N.V.
- Ulrich Moehlmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Cicuit Arrangement, in Particular Phase-Locked Loop, as Well as Cor...
- Publication number 20080204092
- Publication date Aug 28, 2008
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Arrangement for generating a decoder clock signal
- Publication number 20030003888
- Publication date Jan 2, 2003
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY

Ulrich Moehlmann

Person

Patents Grantslast 30 patents

Feedback system monitoring

Duty cycle detector self-testing

System and method of controlling frequency of a digitally controlle...

Clock frequency monitoring for a phase-locked loop based design

Fractional-N ADPLL with reference dithering

Configurable built-in self-test for an all digital phase locked loop

All digital phase locked loop (ADPLL) with frequency locked loop

Phase locked loop with phase and frequency lock detection

Self-testing of a phase-locked loop using a pseudo-random noise

Digital phase locked loops

Phase locked loop with lock/unlock detector

Phase locked loop with reduced noise

Phase locked loop with lock detector

All-digital phase-locked loop (ADPLL) with reduced settling time

Sigma delta modulator

Circuit arrangement and method for locking onto and/or processing d...

Circuit arrangement, in particular phase-locked loop, as well as co...

Arrangement for generating a decoder clock signal

Patents Applicationslast 30 patents

ANALOG PHASE SELECTION TEST SYSTEM

SYSTEM AND METHOD OF CONTROLLING FREQUENCY OF A DIGITALLY CONTROLLE...

RADAR SYSTEM

FEEDBACK SYSTEM MONITORING

DUTY CYCLE DETECTOR SELF-TESTING

PHASE LOCKED LOOP WITH LOCK/UNLOCK DETECTOR

Digital Phase Locked Loops

PHASE LOCKED LOOP WITH LOCK DETECTOR

PHASE LOCKED LOOP WITH REDUCED NOISE

ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL) WITH REDUCED SETTLING TIME

SIGMA DELTA MODULATOR

Circuit Arrangement and Method for Locking onto and/or Processing D...

Cicuit Arrangement, in Particular Phase-Locked Loop, as Well as Cor...

Arrangement for generating a decoder clock signal