V. Swamy Irrinki

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Detecting faults in dual port FIFO memories
- Patent number 6,757,854
- Issue date Jun 29, 2004
- LSI Logic Corporation
- Jun Zhao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel testing of a multiport memory
- Patent number 6,681,358
- Issue date Jan 20, 2004
- LSI Logic Corporation
- Farzin Karimi
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronous bist for embedded multiport memories
- Patent number 6,671,842
- Issue date Dec 30, 2003
- LSI Logic Corporation
- Tuan Phan
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of a scan chain for configuration of BIST unit operation
- Patent number 6,574,762
- Issue date Jun 3, 2003
- LSI Logic Corporation
- Farzin Karimi
- G01 - MEASURING TESTING
Information Patent Grant
Detecting interport faults in multiport static memories
- Patent number 6,550,032
- Issue date Apr 15, 2003
- LSI Logic Corporation
- Jun Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing content addressable static memories
- Patent number 6,496,950
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Jun Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing methodology for embedded memories using built-in self repai...
- Patent number 6,367,042
- Issue date Apr 2, 2002
- LSI Logic Corporation
- Tuan L. Phan
- G01 - MEASURING TESTING
Information Patent Grant
Built-in self-test unit having a reconfigurable data retention test
- Patent number 6,255,836
- Issue date Jul 3, 2001
- LSI Logic Corporation
- William Schwarz
- G01 - MEASURING TESTING
Information Patent Grant
Automatic ranging apparatus and method for precise integrated circu...
- Patent number 6,101,458
- Issue date Aug 8, 2000
- LSI Logic
- Emery Sugasawara
- G01 - MEASURING TESTING
Information Patent Grant
Redundancy analysis for embedded memories with built-in self test a...
- Patent number 6,067,262
- Issue date May 23, 2000
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuitry for determining the defect density of a semiconducto...
- Patent number 6,061,814
- Issue date May 9, 2000
- LSI Logic Corporation
- Emery O. Sugasawara
- G01 - MEASURING TESTING
Information Patent Grant
Method of testing memory operations employing self-repair circuitry...
- Patent number 5,987,632
- Issue date Nov 16, 1999
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell capable of storing more than two logic states by using...
- Patent number 5,982,659
- Issue date Nov 9, 1999
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Built in self repair for DRAMs using on-chip temperature sensing an...
- Patent number 5,956,350
- Issue date Sep 21, 1999
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit and method for multivalued logic storage by process...
- Patent number 5,867,423
- Issue date Feb 2, 1999
- LSI Logic Corporation
- Ashok Kapoor
- G11 - INFORMATION STORAGE
Information Patent Grant
Ram cell capable of storing 3 logic states
- Patent number 5,847,990
- Issue date Dec 8, 1998
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for using built in self test to characterize input-to-output...
- Patent number 5,822,228
- Issue date Oct 13, 1998
- LSI Logic Corporation
- V. Swamy Irrinki
- G01 - MEASURING TESTING
Information Patent Grant
Memory system which enables storage and retrieval of more than two...
- Patent number 5,808,932
- Issue date Sep 15, 1998
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including an on-chip temperature sensor for regulatin...
- Patent number 5,784,328
- Issue date Jul 21, 1998
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell capable of storing more than two logic states by using...
- Patent number 5,761,110
- Issue date Jun 2, 1998
- LSI Logic Corporation
- V. Swamy Irrinki
- G11 - INFORMATION STORAGE

V. Swamy Irrinki

Person

Patents Grantslast 30 patents

Detecting faults in dual port FIFO memories

Parallel testing of a multiport memory

Asynchronous bist for embedded multiport memories

Use of a scan chain for configuration of BIST unit operation

Detecting interport faults in multiport static memories

Testing content addressable static memories

Testing methodology for embedded memories using built-in self repai...

Built-in self-test unit having a reconfigurable data retention test

Automatic ranging apparatus and method for precise integrated circu...

Redundancy analysis for embedded memories with built-in self test a...

Test circuitry for determining the defect density of a semiconducto...

Method of testing memory operations employing self-repair circuitry...

Memory cell capable of storing more than two logic states by using...

Built in self repair for DRAMs using on-chip temperature sensing an...

Memory circuit and method for multivalued logic storage by process...

Ram cell capable of storing 3 logic states

Method for using built in self test to characterize input-to-output...

Memory system which enables storage and retrieval of more than two...

Memory system including an on-chip temperature sensor for regulatin...

Memory cell capable of storing more than two logic states by using...