Vaishnav Srinivas

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System for providing a low latency and fast switched cascaded dual...
- Patent number 11,662,765
- Issue date May 30, 2023
- QUALCOMM Incorporated
- Mahalingam Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clocking scheme to receive data
- Patent number 11,493,949
- Issue date Nov 8, 2022
- QUALCOMM Incorporated
- Farrukh Aquil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for compensating for SDRAM signal timing drift th...
- Patent number 11,120,863
- Issue date Sep 14, 2021
- QUALCOMM Incorporated
- Farrukh Aquil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface with adjustable voltage and termination and method...
- Patent number 10,613,613
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Michael Brunolli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic random access memory (DRAM) backchannel communication syste...
- Patent number 10,224,081
- Issue date Mar 5, 2019
- QUALCOMM Incorporated
- David Ian West
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power clocking for a high-speed memory interface
- Patent number 10,169,262
- Issue date Jan 1, 2019
- QUALCOMM Incorporated
- David West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing memory training of dynamic random access memory (DRAM) sy...
- Patent number 9,947,377
- Issue date Apr 17, 2018
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory interface with adjustable voltage and termination and method...
- Patent number 9,910,482
- Issue date Mar 6, 2018
- QUALCOMM Incorporated
- Michael Brunolli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic random access memory (DRAM) backchannel communication syste...
- Patent number 9,881,656
- Issue date Jan 30, 2018
- QUALCOMM Incorporated
- David Ian West
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for routing die signals using external interco...
- Patent number 9,871,012
- Issue date Jan 16, 2018
- QUALCOMM Incorporated
- Vaishnav Srinivas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Providing memory training of dynamic random access memory (DRAM) sy...
- Patent number 9,767,868
- Issue date Sep 19, 2017
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for individually configuring dynamic random acc...
- Patent number 9,734,878
- Issue date Aug 15, 2017
- Qualcomm Incorporated
- Farrukh Aquil
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for individually configuring dynamic random acc...
- Patent number 9,734,890
- Issue date Aug 15, 2017
- QUALCOMM Incorporated
- Farrukh Aquil
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic control of signaling power based on an error rate
- Patent number 9,633,698
- Issue date Apr 25, 2017
- QUALCOMM Incorporated
- Dexter Tamio Chun
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide-band duty cycle correction circuit
- Patent number 9,438,208
- Issue date Sep 6, 2016
- QUALCOMM Incorporated
- Shraddha Sridhar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay circuit
- Patent number 9,397,646
- Issue date Jul 19, 2016
- QUALCOMM Incorporated
- Guneet Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Metal-insulator-metal capacitor structures
- Patent number 9,312,326
- Issue date Apr 12, 2016
- QUALCOMM Incorporated
- Renatas Jakushokas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for selectively terminating signals on a bidir...
- Patent number 9,246,716
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- Dexter Tamio Chun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for selectively terminating signals on a bidir...
- Patent number 9,088,445
- Issue date Jul 21, 2015
- QUALCOMM Incorporated
- Dexter T. Chun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Metal-insulator-metal capacitor structures
- Patent number 9,041,148
- Issue date May 26, 2015
- QUALCOMM Incorporated
- Renatas Jakushokas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit floorplan for compact clock distribution
- Patent number 9,032,358
- Issue date May 12, 2015
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measure-based delay circuit
- Patent number 8,957,714
- Issue date Feb 17, 2015
- QUALCOMM Incorporated
- Vaishnav Srinivas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High signal level compliant input/output circuits
- Patent number 8,593,203
- Issue date Nov 26, 2013
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High signal level compliant input/output circuits
- Patent number 8,138,814
- Issue date Mar 20, 2012
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High signal level compliant input/output circuits
- Patent number 8,106,699
- Issue date Jan 31, 2012
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low voltage differential signaling driver with programmable on-chip...
- Patent number 8,008,944
- Issue date Aug 30, 2011
- QUALCOMM Incorporated
- Abhay S. Dixit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Break-before-make predriver and level-shifter
- Patent number 7,843,234
- Issue date Nov 30, 2010
- QUALCOMM Incorporated
- Vaishnav Srinivas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High signal level compliant input/output circuits
- Patent number 7,804,334
- Issue date Sep 28, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for testing packaged dies
- Patent number 7,772,831
- Issue date Aug 10, 2010
- QUALCOMM Incorporated
- Tauseef Kazi
- G01 - MEASURING TESTING
Information Patent Grant
High signal level compliant input/output circuits
- Patent number 7,772,887
- Issue date Aug 10, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE COMPRISING INTEGRATED DEVICES
- Publication number 20240038672
- Publication date Feb 1, 2024
- QUALCOMM Incorporated
- Mahalingam NAGARAJAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Improved Clocking Scheme to Receive Data
- Publication number 20210303020
- Publication date Sep 30, 2021
- QUALCOMM Incorporated
- Farrukh AQUIL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR COMPENSATING FOR SDRAM SIGNAL TIMING DRIFT TH...
- Publication number 20210233579
- Publication date Jul 29, 2021
- QUALCOMM Incorporated
- FARRUKH AQUIL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INTERFACE WITH ADJUSTABLE VOLTAGE AND TERMINATION AND METHOD...
- Publication number 20180129267
- Publication date May 10, 2018
- QUALCOMM Incorporated
- Michael BRUNOLLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY (DRAM) BACKCHANNEL COMMUNICATION SYSTE...
- Publication number 20180114553
- Publication date Apr 26, 2018
- QUALCOMM Incorporated
- David Ian West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SY...
- Publication number 20170278554
- Publication date Sep 28, 2017
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACC...
- Publication number 20170236567
- Publication date Aug 17, 2017
- QUALCOMM Incorporated
- FARRUKH AQUIL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACC...
- Publication number 20170236572
- Publication date Aug 17, 2017
- QUALCOMM Incorporated
- FARRUKH AQUIL
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INTERFACE WITH ADJUSTABLE VOLTAGE AND TERMINATION AND METHOD...
- Publication number 20170090546
- Publication date Mar 30, 2017
- QUALCOMM Incorporated
- Michael Brunolli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER CLOCKING FOR A HIGH-SPEED MEMORY INTERFACE
- Publication number 20170017587
- Publication date Jan 19, 2017
- QUALCOMM Incorporated
- David West
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAY CIRCUIT
- Publication number 20160079971
- Publication date Mar 17, 2016
- QUALCOMM Incorporated
- Guneet Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WIDE-BAND DUTY CYCLE CORRECTION CIRCUIT
- Publication number 20150358001
- Publication date Dec 10, 2015
- QUALCOMM Incorporated
- Shraddha Sridhar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC CONTROL OF SIGNALING POWER BASED ON AN ERROR RATE
- Publication number 20150332735
- Publication date Nov 19, 2015
- QUALCOMM Incorporated
- Dexter Tamio CHUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CAPACITOR, RESISTOR AND RESISTOR-CAPACITOR COMPONENTS
- Publication number 20150294970
- Publication date Oct 15, 2015
- QUALCOMM Incorporated
- Renatas Jakushokas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL-INSULATOR-METAL CAPACITOR STRUCTURES
- Publication number 20150221716
- Publication date Aug 6, 2015
- Qualcomm, Incorporated.
- Renatas Jakushokas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SERIAL DATA TRANSMISSION FOR DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN...
- Publication number 20150213850
- Publication date Jul 30, 2015
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G11 - INFORMATION STORAGE
Information Patent Application
PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SY...
- Publication number 20150213849
- Publication date Jul 30, 2015
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY (DRAM) BACKCHANNEL COMMUNICATION SYSTE...
- Publication number 20150194197
- Publication date Jul 9, 2015
- QUALCOMM Incorporated
- David Ian West
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SELECTIVELY TERMINATING SIGNALS ON A BIDIR...
- Publication number 20150194959
- Publication date Jul 9, 2015
- QUALCOMM Incorporated
- Dexter Tamio CHUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL-INSULATOR-METAL CAPACITOR STRUCTURES
- Publication number 20140367757
- Publication date Dec 18, 2014
- Renatas Jakushokas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Measure-Based Delay Circuit
- Publication number 20140266357
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Vaishnav Srinivas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT FLOORPLAN FOR COMPACT CLOCK DISTRIBUTION
- Publication number 20140253228
- Publication date Sep 11, 2014
- QUALCOMM Incorporated
- Vaishnav Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SELECTIVELY TERMINATING SIGNALS ON A BIDIR...
- Publication number 20140253173
- Publication date Sep 11, 2014
- QUALCOMM Incorporated
- Dexter T. Chun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ROUTING DIE SIGNALS USING EXTERNAL INTERCO...
- Publication number 20140061642
- Publication date Mar 6, 2014
- QUALCOMM Incorporated
- Vaishnav Srinivas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP...
- Publication number 20100127736
- Publication date May 27, 2010
- QUALCOMM Incorporated
- ABHAY S. DIXIT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS
- Publication number 20100026363
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS
- Publication number 20100026362
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS
- Publication number 20100026364
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS
- Publication number 20100026348
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS
- Publication number 20100030924
- Publication date Feb 4, 2010
- QUALCOMM Incorporated
- Vijay Shankar
- G06 - COMPUTING CALCULATING COUNTING

Vaishnav Srinivas

Person

Patents Grantslast 30 patents

System for providing a low latency and fast switched cascaded dual...

Clocking scheme to receive data

System and method for compensating for SDRAM signal timing drift th...

Memory interface with adjustable voltage and termination and method...

Dynamic random access memory (DRAM) backchannel communication syste...

Low-power clocking for a high-speed memory interface

Providing memory training of dynamic random access memory (DRAM) sy...

Memory interface with adjustable voltage and termination and method...

Dynamic random access memory (DRAM) backchannel communication syste...

Method and apparatus for routing die signals using external interco...

Providing memory training of dynamic random access memory (DRAM) sy...

Systems and methods for individually configuring dynamic random acc...

Systems and methods for individually configuring dynamic random acc...

Dynamic control of signaling power based on an error rate

Wide-band duty cycle correction circuit

Delay circuit

Metal-insulator-metal capacitor structures

Method and apparatus for selectively terminating signals on a bidir...

Method and apparatus for selectively terminating signals on a bidir...

Metal-insulator-metal capacitor structures

Integrated circuit floorplan for compact clock distribution

Measure-based delay circuit

High signal level compliant input/output circuits

High signal level compliant input/output circuits

High signal level compliant input/output circuits

Low voltage differential signaling driver with programmable on-chip...

Break-before-make predriver and level-shifter

High signal level compliant input/output circuits

Systems and methods for testing packaged dies

High signal level compliant input/output circuits

Patents Applicationslast 30 patents

PACKAGE COMPRISING INTEGRATED DEVICES

Improved Clocking Scheme to Receive Data

SYSTEM AND METHOD FOR COMPENSATING FOR SDRAM SIGNAL TIMING DRIFT TH...

MEMORY INTERFACE WITH ADJUSTABLE VOLTAGE AND TERMINATION AND METHOD...

DYNAMIC RANDOM ACCESS MEMORY (DRAM) BACKCHANNEL COMMUNICATION SYSTE...

PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SY...

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACC...

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACC...

MEMORY INTERFACE WITH ADJUSTABLE VOLTAGE AND TERMINATION AND METHOD...

LOW-POWER CLOCKING FOR A HIGH-SPEED MEMORY INTERFACE

DELAY CIRCUIT

WIDE-BAND DUTY CYCLE CORRECTION CIRCUIT

DYNAMIC CONTROL OF SIGNALING POWER BASED ON AN ERROR RATE

CAPACITOR, RESISTOR AND RESISTOR-CAPACITOR COMPONENTS

METAL-INSULATOR-METAL CAPACITOR STRUCTURES

SERIAL DATA TRANSMISSION FOR DYNAMIC RANDOM ACCESS MEMORY (DRAM) IN...

PROVIDING MEMORY TRAINING OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) SY...

DYNAMIC RANDOM ACCESS MEMORY (DRAM) BACKCHANNEL COMMUNICATION SYSTE...

METHOD AND APPARATUS FOR SELECTIVELY TERMINATING SIGNALS ON A BIDIR...

METAL-INSULATOR-METAL CAPACITOR STRUCTURES

Measure-Based Delay Circuit

INTEGRATED CIRCUIT FLOORPLAN FOR COMPACT CLOCK DISTRIBUTION

METHOD AND APPARATUS FOR SELECTIVELY TERMINATING SIGNALS ON A BIDIR...

METHOD AND APPARATUS FOR ROUTING DIE SIGNALS USING EXTERNAL INTERCO...

LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP...

HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS

HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS

HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS

HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS

HIGH SIGNAL LEVEL COMPLIANT INPUT/OUTPUT CIRCUITS