Valavan Manohararajah

Person

Scarborough, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for memory interface calibration
- Patent number 10,832,787
- Issue date Nov 10, 2020
- Altera Corporation
- Ryan Fung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,572,224
- Issue date Feb 25, 2020
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuring programmable integrated circuit device resources as pro...
- Patent number 10,452,392
- Issue date Oct 22, 2019
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for memory interface calibration
- Patent number 10,332,612
- Issue date Jun 25, 2019
- Altera Corporation
- Ryan Fung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit device configuration methods adapted to account...
- Patent number 10,037,396
- Issue date Jul 31, 2018
- Altera Corporation
- Ryan Fung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,019,234
- Issue date Jul 10, 2018
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for memory interface calibration
- Patent number 9,911,506
- Issue date Mar 6, 2018
- Ryan Fung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for optimizing implementation of a soft proces...
- Patent number 9,891,904
- Issue date Feb 13, 2018
- Altera Corporation
- Jason Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits with improved register circuitry
- Patent number 9,660,650
- Issue date May 23, 2017
- Altera Corporation
- Valavan Manohararajah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing multiple stage physical synthesis
- Patent number 9,589,090
- Issue date Mar 7, 2017
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for memory interface calibration
- Patent number 9,558,849
- Issue date Jan 31, 2017
- Altera Corporation
- Ryan Fung
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuring programmable integrated circuit device resources as pro...
- Patent number 9,553,590
- Issue date Jan 24, 2017
- Altera Corporation
- Valavan Manohararajah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Heterogeneous programmable device and configuration software adapte...
- Patent number 9,401,718
- Issue date Jul 26, 2016
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clocking for pipelined routing
- Patent number 9,360,884
- Issue date Jun 7, 2016
- Altera Corporation
- David Galloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit device configuration methods adapted to account...
- Patent number 9,245,085
- Issue date Jan 26, 2016
- Altera Corporation
- Ryan Fung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelined direct drive routing fabric
- Patent number 9,100,011
- Issue date Aug 4, 2015
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Heterogeneous programmable device and configuration software adapte...
- Patent number 9,030,231
- Issue date May 12, 2015
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing optimization using don't care s...
- Patent number 8,904,318
- Issue date Dec 2, 2014
- Altera Corporation
- Shawn Malhotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous programmable device and configuration software adapte...
- Patent number 8,896,344
- Issue date Nov 25, 2014
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit device configuration methods adapted to account...
- Patent number 8,863,059
- Issue date Oct 14, 2014
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for operating a circuit
- Patent number 8,847,624
- Issue date Sep 30, 2014
- Altera Corporation
- Valavan Manohararajah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Specification of latency in programmable device configuration
- Patent number 8,839,172
- Issue date Sep 16, 2014
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specification of latency in programmable device configuration
- Patent number 8,713,496
- Issue date Apr 29, 2014
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable device configuration methods adapted to account for re...
- Patent number 8,677,298
- Issue date Mar 18, 2014
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing optimization using Don't Care s...
- Patent number 8,661,381
- Issue date Feb 25, 2014
- Altera Corporation
- Shawn Malhotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specification of multithreading in programmable device configuration
- Patent number 8,645,885
- Issue date Feb 4, 2014
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for memory interface calibration
- Patent number 8,588,014
- Issue date Nov 19, 2013
- Altera Corporation
- Ryan Fung
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with multi-stage logic regions
- Patent number 8,581,624
- Issue date Nov 12, 2013
- Altera Corporation
- David Cashman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing asynchronous and synchronous re...
- Patent number 8,578,306
- Issue date Nov 5, 2013
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for calibrating memory interface circuitry
- Patent number 8,565,033
- Issue date Oct 22, 2013
- Altera Corporation
- Valavan Manohararajah
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS FOR MEMORY INTERFACE CALIBRATION
- Publication number 20210082534
- Publication date Mar 18, 2021
- Altera Corporation
- Ryan Fung
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR MEMORY INTERFACE CALIBRATION
- Publication number 20190287638
- Publication date Sep 19, 2019
- Altera Corporation
- Ryan Fung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS
- Publication number 20180349098
- Publication date Dec 6, 2018
- Intel Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR MEMORY INTERFACE CALIBRATION
- Publication number 20180151243
- Publication date May 31, 2018
- Altera Corporation
- Ryan Fung
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS
- Publication number 20170097810
- Publication date Apr 6, 2017
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCKING FOR PIPELINED ROUTING
- Publication number 20160239043
- Publication date Aug 18, 2016
- Altera Corporation
- David Galloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DEVICE CONFIGURATION METHODS ADAPTED TO ACCOUNT...
- Publication number 20160098507
- Publication date Apr 7, 2016
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCKING FOR PIPELINED ROUTING
- Publication number 20150134870
- Publication date May 14, 2015
- Altera Corporation
- David Galloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DEVICE CONFIGURATION METHODS ADAPTED TO ACCOUNT...
- Publication number 20150033198
- Publication date Jan 29, 2015
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS WITH MULTI-STAGE LOGIC REGIONS
- Publication number 20130257476
- Publication date Oct 3, 2013
- David Cashman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Performing Memory Interface Calibration
- Publication number 20120110400
- Publication date May 3, 2012
- Altera Corporation
- Valavan Manohararajah
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for performing asynchronous and synchronous re...
- Publication number 20110283250
- Publication date Nov 17, 2011
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING

Valavan Manohararajah

Person

Patents Grantslast 30 patents

Methods for memory interface calibration

Methods and apparatus for sequencing multiply-accumulate operations

Configuring programmable integrated circuit device resources as pro...

Methods for memory interface calibration

Integrated circuit device configuration methods adapted to account...

Methods and apparatus for sequencing multiply-accumulate operations

Methods for memory interface calibration

Method and apparatus for optimizing implementation of a soft proces...

Integrated circuits with improved register circuitry

Method and apparatus for performing multiple stage physical synthesis

Methods for memory interface calibration

Configuring programmable integrated circuit device resources as pro...

Heterogeneous programmable device and configuration software adapte...

Clocking for pipelined routing

Integrated circuit device configuration methods adapted to account...

Pipelined direct drive routing fabric

Heterogeneous programmable device and configuration software adapte...

Method and apparatus for performing optimization using don't care s...

Heterogeneous programmable device and configuration software adapte...

Integrated circuit device configuration methods adapted to account...

Method and system for operating a circuit

Specification of latency in programmable device configuration

Specification of latency in programmable device configuration

Programmable device configuration methods adapted to account for re...

Method and apparatus for performing optimization using Don't Care s...

Specification of multithreading in programmable device configuration

Methods for memory interface calibration

Integrated circuits with multi-stage logic regions

Method and apparatus for performing asynchronous and synchronous re...

Methods for calibrating memory interface circuitry

Patents Applicationslast 30 patents

METHODS FOR MEMORY INTERFACE CALIBRATION

METHODS FOR MEMORY INTERFACE CALIBRATION

METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS

METHODS FOR MEMORY INTERFACE CALIBRATION

METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS

CLOCKING FOR PIPELINED ROUTING

INTEGRATED CIRCUIT DEVICE CONFIGURATION METHODS ADAPTED TO ACCOUNT...

CLOCKING FOR PIPELINED ROUTING

INTEGRATED CIRCUIT DEVICE CONFIGURATION METHODS ADAPTED TO ACCOUNT...

INTEGRATED CIRCUITS WITH MULTI-STAGE LOGIC REGIONS

Method and Apparatus for Performing Memory Interface Calibration

Method and apparatus for performing asynchronous and synchronous re...