Valery TEPER

Person

Petah-Tikwa, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Protection from side-channel attacks by varying clock delays
- Patent number 10,019,571
- Issue date Jul 10, 2018
- WINBOND ELECTRONICS CORPORATION
- Valery Teper
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Snooping detection between silicon elements in a circuit
- Patent number 9,846,187
- Issue date Dec 19, 2017
- Winbond Electronics Corporation
- Valery Teper
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protection of memory interface
- Patent number 9,819,657
- Issue date Nov 14, 2017
- Winbond Electronics Corporation
- Nir Tasher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secured computing system with asynchronous authentication
- Patent number 9,703,945
- Issue date Jul 11, 2017
- Winbond Electronics Corporation
- Ziv Hershman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Level faults interception in integrated circuits
- Patent number 9,697,310
- Issue date Jul 4, 2017
- Winbond Electronics Corporation
- Valery Teper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for supply voltage glitch detection in a monol...
- Patent number 9,523,722
- Issue date Dec 20, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with secure test mode
- Patent number 9,471,413
- Issue date Oct 18, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G11 - INFORMATION STORAGE
Information Patent Grant
Protecting memory interface
- Patent number 9,455,962
- Issue date Sep 27, 2016
- Winbond Electronics Corporation
- Nir Tasher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fault protection for high-fanout signal distribution circuitry
- Patent number 9,397,663
- Issue date Jul 19, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G01 - MEASURING TESTING
Information Patent Grant
Protection against side-channel attacks on non-volatile memory
- Patent number 9,343,162
- Issue date May 17, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with secure test mode
- Patent number 9,318,221
- Issue date Apr 19, 2016
- WINBOUND ELECTRONICS CORPORATION
- Nir Tasher
- G11 - INFORMATION STORAGE
Information Patent Grant
State-machine clock tampering detection
- Patent number 9,223,960
- Issue date Dec 29, 2015
- WINBOND ELECTRONICS CORPORATION
- Uri Kaluzhny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure lock mechanism based on a lock word
- Patent number 7,398,554
- Issue date Jul 8, 2008
- Winbond Electronics Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROTECTION FROM SIDE-CHANNEL ATTACKS BY VARYING CLOCK DELAYS
- Publication number 20170262630
- Publication date Sep 14, 2017
- Winbond Electronics Corporation
- Valery Teper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL FAULTS INTERCEPTION IN INTEGRATED CIRCUITS
- Publication number 20170124238
- Publication date May 4, 2017
- Winbond Electronics Corporation
- Valery TEPER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SNOOPING DETECTION BETWEEN SILICON ELEMENTS IN A CIRCUIT
- Publication number 20160334449
- Publication date Nov 17, 2016
- Winbond Electronics Corporation
- Valery TEPER
- G01 - MEASURING TESTING
Information Patent Application
PROTECTION OF MEMORY INTERFACE
- Publication number 20160294792
- Publication date Oct 6, 2016
- WINBOND ELECTRONICS CORPORATION
- Nir Tasher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY DEVICE WITH SECURE TEST MODE
- Publication number 20160139976
- Publication date May 19, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT PROTECTION FOR HIGH-FANOUT SIGNAL DISTRIBUTION CIRCUITRY
- Publication number 20160028394
- Publication date Jan 28, 2016
- Winbond Electronics Corporation
- Nir Tasher
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Supply Voltage Glitch Detection in a Monol...
- Publication number 20150346246
- Publication date Dec 3, 2015
- WINBOND ELECTRONICS CORPORATION
- Nir Tasher
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE WITH SECURE TEST MODE
- Publication number 20150287477
- Publication date Oct 8, 2015
- Winbond Electronics Corporation
- Nir Tasher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTION AGAINST SIDE-CHANNEL ATTACKS ON NON-VOLATILE MEMORY
- Publication number 20150103598
- Publication date Apr 16, 2015
- WINBOND ELECTRONICS CORPORATION
- Nir Tasher
- G11 - INFORMATION STORAGE
Information Patent Application
PROTECTING MEMORY INTERFACE
- Publication number 20150089223
- Publication date Mar 26, 2015
- Winbond Electronics Corporation
- Nir Tasher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SECURED COMPUTING SYSTEM WITH ASYNCHRONOUS AUTHENTICATION
- Publication number 20140082721
- Publication date Mar 20, 2014
- Nuvoton Technology Corporation
- Ziv Hershman
- G06 - COMPUTING CALCULATING COUNTING

Valery TEPER

Person

Patents Grantslast 30 patents

Protection from side-channel attacks by varying clock delays

Snooping detection between silicon elements in a circuit

Protection of memory interface

Secured computing system with asynchronous authentication

Level faults interception in integrated circuits

Method and apparatus for supply voltage glitch detection in a monol...

Memory device with secure test mode

Protecting memory interface

Fault protection for high-fanout signal distribution circuitry

Protection against side-channel attacks on non-volatile memory

Memory device with secure test mode

State-machine clock tampering detection

Secure lock mechanism based on a lock word

Patents Applicationslast 30 patents

PROTECTION FROM SIDE-CHANNEL ATTACKS BY VARYING CLOCK DELAYS

LEVEL FAULTS INTERCEPTION IN INTEGRATED CIRCUITS

SNOOPING DETECTION BETWEEN SILICON ELEMENTS IN A CIRCUIT

PROTECTION OF MEMORY INTERFACE

MEMORY DEVICE WITH SECURE TEST MODE

FAULT PROTECTION FOR HIGH-FANOUT SIGNAL DISTRIBUTION CIRCUITRY

Method and Apparatus for Supply Voltage Glitch Detection in a Monol...

MEMORY DEVICE WITH SECURE TEST MODE

PROTECTION AGAINST SIDE-CHANNEL ATTACKS ON NON-VOLATILE MEMORY

PROTECTING MEMORY INTERFACE

SECURED COMPUTING SYSTEM WITH ASYNCHRONOUS AUTHENTICATION