Valery Y. Gorshtein

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for performing pipelined SRT division
- Patent number 6,751,645
- Issue date Jun 15, 2004
- Elbrus International Limited
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for conflict-free execution of integer and flo...
- Patent number 6,668,316
- Issue date Dec 23, 2003
- Elbrus International Limited
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication apparatus and methods which generate a shift amount...
- Patent number 5,963,461
- Issue date Oct 5, 1999
- Sun Microsystems, Inc.
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multifunctional execution unit having independently operable adder...
- Patent number 5,923,871
- Issue date Jul 13, 1999
- Elbrus International
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing computer instrucrions by circuits having different latencies
- Patent number 5,844,830
- Issue date Dec 1, 1998
- Sun Microsystems, Inc.
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point addition methods and apparatus
- Patent number 5,808,926
- Issue date Sep 15, 1998
- Sun Microsystems, Inc.
- Valery Y. Gorshtein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wide instruction word architecture central processor
- Patent number 5,418,975
- Issue date May 23, 1995
- Institut Tochnoi Mekhaniki I Vychislitelnoi Tekhniki Imeni S.A. Lebedeva Akad...
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Floating Point Addition
- Publication number 20080133895
- Publication date Jun 5, 2008
- Alexey Yurievich Sivtsov
- G06 - COMPUTING CALCULATING COUNTING

Valery Y. Gorshtein

Person

Patents Grantslast 30 patents

Methods and apparatus for performing pipelined SRT division

Method and apparatus for conflict-free execution of integer and flo...

Multiplication apparatus and methods which generate a shift amount...

Multifunctional execution unit having independently operable adder...

Executing computer instrucrions by circuits having different latencies

Floating point addition methods and apparatus

Wide instruction word architecture central processor

Patents Applicationslast 30 patents

Floating Point Addition