Vamsi Rayaprolu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Model for predicting memory system performance
- Patent number 12,230,315
- Issue date Feb 18, 2025
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Measurement of representative charge loss in a block to determine c...
- Patent number 12,223,190
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system write sequence track
- Patent number 12,182,013
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system media management groups
- Patent number 12,164,804
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-temperature compensation based on media endurance in memory d...
- Patent number 12,164,783
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Hyungseok Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system scan
- Patent number 12,148,484
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive temperature compensation for a memory device
- Patent number 12,131,795
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Media management operations based on health characteristics of memo...
- Patent number 12,131,790
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Ashutosh Malshe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program continuation strategies after memory device power loss
- Patent number 12,119,068
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Grant
Power state aware scan frequency
- Patent number 12,087,369
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Error-handling management during copyback operations in memory devices
- Patent number 12,072,762
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive scanning of memory devices with supervised learning
- Patent number 12,050,777
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Li-Te Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-sided page scans with calibration feedback
- Patent number 12,040,025
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Christopher M. Smitchger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of error-handling flows in memory devices using probabil...
- Patent number 12,032,833
- Issue date Jul 9, 2024
- Micron Technology, Inc.
- Aswin Thiruvengadam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive optimization of error-handling flows in memory devices
- Patent number 12,019,874
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing a refresh operation in a memory sub-system
- Patent number 12,009,042
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accessing data using error correction operation(s) to reduce latenc...
- Patent number 12,007,838
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated optimization of error-handling flows in memory devices
- Patent number 11,994,936
- Issue date May 28, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan fragmentation in memory devices
- Patent number 11,995,320
- Issue date May 28, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerating configuration updates for memory devices
- Patent number 11,984,174
- Issue date May 14, 2024
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase cycle healing using a high voltage pulse
- Patent number 11,978,514
- Issue date May 7, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge loss mitigation throughout memory device lifecycle by proact...
- Patent number 11,977,774
- Issue date May 7, 2024
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Media management operations based on a ratio of valid data
- Patent number 11,972,130
- Issue date Apr 30, 2024
- Micron Technology, Inc.
- Ashutosh Malshe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combination scan management for block families of a memory device
- Patent number 11,941,277
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating slow read disturb in a memory sub-system
- Patent number 11,941,285
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing a program operation based on a high voltage pulse to sec...
- Patent number 11,942,160
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory compaction management in memory devices
- Patent number 11,934,266
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line group read counters
- Patent number 11,934,689
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Michael G. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-page parity data storage in a memory device
- Patent number 11,928,353
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Harish R Singidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selection of read offset values in a memory sub-system based on tem...
- Patent number 11,923,021
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SUB-SYSTEM MEDIA MANAGEMENT GROUPS
- Publication number 20250103246
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY D...
- Publication number 20250053317
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Hyungseok Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE TEMPERATURE COMPENSATION FOR A MEMORY DEVICE
- Publication number 20250029639
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CONTINUATION STRATEGIES AFTER MEMORY DEVICE POWER LOSS
- Publication number 20250006281
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Gary F. Besinga
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES
- Publication number 20240370333
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE SCANNING OF MEMORY DEVICES WITH SUPERVISED LEARNING
- Publication number 20240329852
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Li-Te Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20240302968
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESSING DATA USING ERROR CORRECTION OPERATION(S) TO REDUCE LATENC...
- Publication number 20240296092
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF ERROR-HANDLING FLOWS IN MEMORY DEVICES USING PROBABIL...
- Publication number 20240289032
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Aswin Thiruvengadam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20240256375
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES
- Publication number 20240257887
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Tawalin Opastrakoon
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE LOSS MITIGATION THROUGHOUT MEMORY DEVICE LIFECYCLE BY PROACT...
- Publication number 20240241672
- Publication date Jul 18, 2024
- MICRON TECHNOLGY, INC.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM
- Publication number 20240184481
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES
- Publication number 20240176698
- Publication date May 30, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING SELECTIVE COPYBACK IN MEMORY DEVICES
- Publication number 20240127900
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Vamsi Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES
- Publication number 20240111445
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING RECOVERED DATA TO A NEW MEMORY CELL AT A MEMORY SUB-SYSTE...
- Publication number 20240103749
- Publication date Mar 28, 2024
- Micron Technology, Inc.
- Sampath K. Ratnam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF ERROR-HANDLING FLOWS IN MEMORY DEVICES USING PROBABIL...
- Publication number 20240086075
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Aswin Thiruvengadam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK
- Publication number 20240086316
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-COMPENSATED TIME ESTIMATE FOR A BLOCK TO REACH A UNIFOR...
- Publication number 20240079035
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY D...
- Publication number 20240069745
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Hyungseok Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20240070008
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST DATA STORAGE SCAN DATA RETENTION RATING
- Publication number 20240069785
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE INTEGRITY SCAN RATES IN A MEMORY SUB-SYSTEM BASED ON BLOCK...
- Publication number 20240062835
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES
- Publication number 20240054046
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODEL FOR PREDICTING MEMORY SYSTEM PERFORMANCE
- Publication number 20240055046
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20240053893
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Jay Sarkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE SCANNING OF MEMORY DEVICES WITH SUPERVISED LEARNING
- Publication number 20240045595
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Li-Te Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESSING DATA USING ERROR CORRECTION OPERATION(S) TO REDUCE LATENC...
- Publication number 20240036973
- Publication date Feb 1, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INTEGRITY CHECKS BASED ON VOLTAGE DISTRIBUTION METRICS
- Publication number 20240021258
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE

Vamsi Rayaprolu

Person

Patents Grantslast 30 patents

Model for predicting memory system performance

Measurement of representative charge loss in a block to determine c...

Memory sub-system write sequence track

Memory sub-system media management groups

Cross-temperature compensation based on media endurance in memory d...

Memory sub-system scan

Adaptive temperature compensation for a memory device

Media management operations based on health characteristics of memo...

Program continuation strategies after memory device power loss

Power state aware scan frequency

Error-handling management during copyback operations in memory devices

Adaptive scanning of memory devices with supervised learning

Two-sided page scans with calibration feedback

Management of error-handling flows in memory devices using probabil...

Adaptive optimization of error-handling flows in memory devices

Executing a refresh operation in a memory sub-system

Accessing data using error correction operation(s) to reduce latenc...

Automated optimization of error-handling flows in memory devices

Scan fragmentation in memory devices

Accelerating configuration updates for memory devices

Erase cycle healing using a high voltage pulse

Charge loss mitigation throughout memory device lifecycle by proact...

Media management operations based on a ratio of valid data

Combination scan management for block families of a memory device

Mitigating slow read disturb in a memory sub-system

Performing a program operation based on a high voltage pulse to sec...

Memory compaction management in memory devices

Word line group read counters

Multi-page parity data storage in a memory device

Selection of read offset values in a memory sub-system based on tem...

Patents Applicationslast 30 patents

MEMORY SUB-SYSTEM MEDIA MANAGEMENT GROUPS

CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY D...

ADAPTIVE TEMPERATURE COMPENSATION FOR A MEMORY DEVICE

PROGRAM CONTINUATION STRATEGIES AFTER MEMORY DEVICE POWER LOSS

ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES

ADAPTIVE SCANNING OF MEMORY DEVICES WITH SUPERVISED LEARNING

ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

ACCESSING DATA USING ERROR CORRECTION OPERATION(S) TO REDUCE LATENC...

MANAGEMENT OF ERROR-HANDLING FLOWS IN MEMORY DEVICES USING PROBABIL...

AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

ACCELERATING CONFIGURATION UPDATES FOR MEMORY DEVICES

CHARGE LOSS MITIGATION THROUGHOUT MEMORY DEVICE LIFECYCLE BY PROACT...

MITIGATING SLOW READ DISTURB IN A MEMORY SUB-SYSTEM

MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES

PERFORMING SELECTIVE COPYBACK IN MEMORY DEVICES

BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES

PROVIDING RECOVERED DATA TO A NEW MEMORY CELL AT A MEMORY SUB-SYSTE...

MANAGEMENT OF ERROR-HANDLING FLOWS IN MEMORY DEVICES USING PROBABIL...

MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK

TEMPERATURE-COMPENSATED TIME ESTIMATE FOR A BLOCK TO REACH A UNIFOR...

CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY D...

AUTOMATED OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

HOST DATA STORAGE SCAN DATA RETENTION RATING

ADAPTIVE INTEGRITY SCAN RATES IN A MEMORY SUB-SYSTEM BASED ON BLOCK...

ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES

MODEL FOR PREDICTING MEMORY SYSTEM PERFORMANCE

ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES

ADAPTIVE SCANNING OF MEMORY DEVICES WITH SUPERVISED LEARNING

ACCESSING DATA USING ERROR CORRECTION OPERATION(S) TO REDUCE LATENC...

DATA INTEGRITY CHECKS BASED ON VOLTAGE DISTRIBUTION METRICS