Varun Mallikarjunan

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Tightly-coupled context-aware irritator thread creation for verific...
- Patent number 9,158,640
- Issue date Oct 13, 2015
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validating cache coherency protocol within a processor
- Patent number 8,930,760
- Issue date Jan 6, 2015
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic optimization of thread assignments for application workload...
- Patent number 8,904,403
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Kumar Prathiba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective validation of execution units within a processor
- Patent number 8,892,949
- Issue date Nov 18, 2014
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective validation of execution units within a processor
- Patent number 8,850,266
- Issue date Sep 30, 2014
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measuring runtime coverage of architectural events of a microprocessor
- Patent number 8,667,255
- Issue date Mar 4, 2014
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic operating system optimization in parallel computing
- Patent number 8,607,243
- Issue date Dec 10, 2013
- International Business Machines Corporation
- Prathiba Kumar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Tightly-Coupled Context-Aware Irritator Thread Creation for Verific...
- Publication number 20150127984
- Publication date May 7, 2015
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Validating Cache Coherency Protocol Within a Processor
- Publication number 20140173222
- Publication date Jun 19, 2014
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Effective Validation of Execution Units Within a Processor
- Publication number 20140059383
- Publication date Feb 27, 2014
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC OPERATING SYSTEM OPTIMIZATION IN PARALLEL COMPUTING
- Publication number 20130074090
- Publication date Mar 21, 2013
- International Business Machines Corporation New Orchard Road
- Prathiba Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC OPERATING SYSTEM OPTIMIZATION IN PARALLEL COMPUTING
- Publication number 20130074084
- Publication date Mar 21, 2013
- International Business Machines Corporation
- Prathiba Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Effective Validation of Execution Units Within a Processor
- Publication number 20120324208
- Publication date Dec 20, 2012
- International Business Machines Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methodology and Framework for Run-Time Coverage Measurement of Arch...
- Publication number 20120084538
- Publication date Apr 5, 2012
- IBM Corporation
- Sangram Alapati
- G06 - COMPUTING CALCULATING COUNTING

Varun Mallikarjunan

Person

Patents Grantslast 30 patents

Tightly-coupled context-aware irritator thread creation for verific...

Validating cache coherency protocol within a processor

Dynamic optimization of thread assignments for application workload...

Effective validation of execution units within a processor

Effective validation of execution units within a processor

Measuring runtime coverage of architectural events of a microprocessor

Dynamic operating system optimization in parallel computing

Patents Applicationslast 30 patents

Tightly-Coupled Context-Aware Irritator Thread Creation for Verific...

Validating Cache Coherency Protocol Within a Processor

Effective Validation of Execution Units Within a Processor

DYNAMIC OPERATING SYSTEM OPTIMIZATION IN PARALLEL COMPUTING

DYNAMIC OPERATING SYSTEM OPTIMIZATION IN PARALLEL COMPUTING

Effective Validation of Execution Units Within a Processor

Methodology and Framework for Run-Time Coverage Measurement of Arch...