Vasant B. Rao

Person

Fishkill, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Statistical timing analysis considering multiple-input switching
- Patent number 11,093,675
- Issue date Aug 17, 2021
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model order reduction in transistor level timing
- Patent number 10,949,593
- Issue date Mar 16, 2021
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model order reduction in transistor level timing
- Patent number 10,394,986
- Issue date Aug 27, 2019
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-cycle signal identification for static timing analysis
- Patent number 10,360,329
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental common path pessimism analysis
- Patent number 10,325,059
- Issue date Jun 18, 2019
- International Business Machines Corporation
- Tsung-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model order reduction in transistor level timing
- Patent number 10,031,988
- Issue date Jul 24, 2018
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental common path pessimism analysis
- Patent number 9,836,572
- Issue date Dec 5, 2017
- International Business Machines Corporation
- Tsung-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel multi-threaded common path pessimism removal in multiple p...
- Patent number 9,785,737
- Issue date Oct 10, 2017
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validating variation of timing constraint measurements
- Patent number 9,760,664
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Sachin K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validating variation of timing constraint measurements
- Patent number 9,760,665
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Sachin K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prioritized path tracing in statistical timing analysis of integrat...
- Patent number 9,690,899
- Issue date Jun 27, 2017
- International Business Machines Corporation
- Vasant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deterministic and statistical timing modeling for differential circ...
- Patent number 9,659,121
- Issue date May 23, 2017
- International Business Machines Corporation
- Hemlata Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-cycle signal identification for static timing analysis
- Patent number 9,613,171
- Issue date Apr 4, 2017
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing analysis of circuits using sub-circuit timing models
- Patent number 9,501,608
- Issue date Nov 22, 2016
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for improving static timing analysis and optimizing circuits...
- Patent number 8,776,004
- Issue date Jul 8, 2014
- International Business Machines Corporation
- Frank Borkam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling loading effects of a transistor network
- Patent number 8,655,634
- Issue date Feb 18, 2014
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing point selection for a static timing analysis in the presence...
- Patent number 8,201,120
- Issue date Jun 12, 2012
- International Business Machines Corporation
- Jeffrey P. Soreff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Affinity-based clustering of vectors for partitioning the columns o...
- Patent number 8,112,735
- Issue date Feb 7, 2012
- International Business Machines Corporation
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Affinity-based clustering of vectors for partitioning the columns o...
- Patent number 7,958,484
- Issue date Jun 7, 2011
- International Business Machines Corporation
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for improved hierarchical analysis of electronic...
- Patent number 7,870,515
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Philip G. Shephard, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse waveform timing in EinsTLT templates
- Patent number 7,643,981
- Issue date Jan 5, 2010
- International Business Machines Corporation
- Sang Y. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Affinity-based clustering of vectors for partitioning the columns o...
- Patent number 7,353,359
- Issue date Apr 1, 2008
- International Business Machines Corporation
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid linear wire model approach to tuning transistor widths of ci...
- Patent number 7,325,210
- Issue date Jan 29, 2008
- International Business Machines Corporation
- Vasant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for reducing RC parasitics in interconnect networks of an in...
- Patent number 6,763,504
- Issue date Jul 13, 2004
- International Business Machines Corporation
- Vasant B. Rao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOCATION AWARE TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT
- Publication number 20240330556
- Publication date Oct 3, 2024
- International Business Machines Corporation
- JAMES J. ENGEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING
- Publication number 20190332735
- Publication date Oct 31, 2019
- International Business Machines Corporation
- Robert J. ALLEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COGNITIVE SYSTEM TO ITERATIVELY EXPAND A KNOWLEDGE BASE
- Publication number 20190138916
- Publication date May 9, 2019
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING
- Publication number 20180373830
- Publication date Dec 27, 2018
- International Business Machines Corporation
- Robert J. ALLEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREMENTAL COMMON PATH PESSIMISM ANALYSIS
- Publication number 20180046748
- Publication date Feb 15, 2018
- International Business Machines Corporation
- Tsung-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CYCLE SIGNAL IDENTIFICATION FOR STATIC TIMING ANALYSIS
- Publication number 20170206294
- Publication date Jul 20, 2017
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC AND STATISTICAL TIMING MODELING FOR DIFFERENTIAL CIRC...
- Publication number 20170169148
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Hemlata Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREMENTAL COMMON PATH PESSIMISM ANALYSIS
- Publication number 20170147737
- Publication date May 25, 2017
- International Business Machines Corporation
- Tsung-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL MULTI-THREADED COMMON PATH PESSIMISM REMOVAL IN MULTIPLE P...
- Publication number 20170140089
- Publication date May 18, 2017
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITIZED PATH TRACING IN STATISTICAL TIMING ANALYSIS OF INTEGRAT...
- Publication number 20170046469
- Publication date Feb 16, 2017
- International Business Machines Corporation
- Vasant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Validating Variation of Timing Constraint Measurements
- Publication number 20170011153
- Publication date Jan 12, 2017
- International Business Machines Corporation
- SACHIN K. GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Validating Variation of Timing Constraint Measurements
- Publication number 20170011154
- Publication date Jan 12, 2017
- International Business Machines Corporation
- SACHIN K. GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING ANALYSIS OF CIRCUITS USING SUB-CIRCUIT TIMING MODELS
- Publication number 20160364519
- Publication date Dec 15, 2016
- International Business Machines Corporation
- Robert J. Allen
- G01 - MEASURING TESTING
Information Patent Application
MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING
- Publication number 20160085890
- Publication date Mar 24, 2016
- International Business Machines Corporation
- Robert J. ALLEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Improving Static Timing Analysis and Optimizing Circuits...
- Publication number 20120185810
- Publication date Jul 19, 2012
- International Business Machines Corporation
- Frank Borkam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modeling Loading Effects of a Transistor Network
- Publication number 20110224965
- Publication date Sep 15, 2011
- International Business Machines Corporation
- David J. Hathaway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timing Point Selection For A Static Timing Analysis In The Presence...
- Publication number 20110167395
- Publication date Jul 7, 2011
- International Business Machines Corporation
- Jeffrey P. Soreff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Improved Hierarchical Analysis of Electronic...
- Publication number 20090183130
- Publication date Jul 16, 2009
- Philip G. Shephard, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS O...
- Publication number 20080140983
- Publication date Jun 12, 2008
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS O...
- Publication number 20070276896
- Publication date Nov 29, 2007
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple mode approach to building static timing models for digital...
- Publication number 20070234253
- Publication date Oct 4, 2007
- International Business Machines Corporation
- Jeffrey P. Soreff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid linear wire model approach to tuning transistor widths of ci...
- Publication number 20060206845
- Publication date Sep 14, 2006
- International Business Machines Corporation
- Vasant Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse waveform timing in EinsTLT templates
- Publication number 20060020443
- Publication date Jan 26, 2006
- International Business Machines Corporation
- Sang Y. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Affinity-based clustering of vectors for partitioning the columns o...
- Publication number 20050091298
- Publication date Apr 28, 2005
- International Business Machines Corporation
- Kerim Kalafala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for reducing RC parasitics in interconnect networks of an in...
- Publication number 20040049746
- Publication date Mar 11, 2004
- International Business Machine Corporation
- Vasant B. Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit simulator system and method
- Publication number 20030182639
- Publication date Sep 25, 2003
- International Business Machines Corporation
- Timothy S. Lehner
- G06 - COMPUTING CALCULATING COUNTING

Vasant B. Rao

Person

Patents Grantslast 30 patents

Statistical timing analysis considering multiple-input switching

Model order reduction in transistor level timing

Model order reduction in transistor level timing

Multi-cycle signal identification for static timing analysis

Incremental common path pessimism analysis

Model order reduction in transistor level timing

Incremental common path pessimism analysis

Parallel multi-threaded common path pessimism removal in multiple p...

Validating variation of timing constraint measurements

Validating variation of timing constraint measurements

Prioritized path tracing in statistical timing analysis of integrat...

Deterministic and statistical timing modeling for differential circ...

Multi-cycle signal identification for static timing analysis

Timing analysis of circuits using sub-circuit timing models

Method for improving static timing analysis and optimizing circuits...

Modeling loading effects of a transistor network

Timing point selection for a static timing analysis in the presence...

Affinity-based clustering of vectors for partitioning the columns o...

Affinity-based clustering of vectors for partitioning the columns o...

System and method for improved hierarchical analysis of electronic...

Pulse waveform timing in EinsTLT templates

Affinity-based clustering of vectors for partitioning the columns o...

Hybrid linear wire model approach to tuning transistor widths of ci...

Method for reducing RC parasitics in interconnect networks of an in...

Patents Applicationslast 30 patents

LOCATION AWARE TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT

MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING

COGNITIVE SYSTEM TO ITERATIVELY EXPAND A KNOWLEDGE BASE

MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING

INCREMENTAL COMMON PATH PESSIMISM ANALYSIS

MULTI-CYCLE SIGNAL IDENTIFICATION FOR STATIC TIMING ANALYSIS

DETERMINISTIC AND STATISTICAL TIMING MODELING FOR DIFFERENTIAL CIRC...

INCREMENTAL COMMON PATH PESSIMISM ANALYSIS

PARALLEL MULTI-THREADED COMMON PATH PESSIMISM REMOVAL IN MULTIPLE P...

PRIORITIZED PATH TRACING IN STATISTICAL TIMING ANALYSIS OF INTEGRAT...

Validating Variation of Timing Constraint Measurements

Validating Variation of Timing Constraint Measurements

TIMING ANALYSIS OF CIRCUITS USING SUB-CIRCUIT TIMING MODELS

MODEL ORDER REDUCTION IN TRANSISTOR LEVEL TIMING

Method for Improving Static Timing Analysis and Optimizing Circuits...

Modeling Loading Effects of a Transistor Network

Timing Point Selection For A Static Timing Analysis In The Presence...

System and Method for Improved Hierarchical Analysis of Electronic...

AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS O...

AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS O...

Multiple mode approach to building static timing models for digital...

Hybrid linear wire model approach to tuning transistor widths of ci...

Pulse waveform timing in EinsTLT templates

Affinity-based clustering of vectors for partitioning the columns o...

Method for reducing RC parasitics in interconnect networks of an in...

Circuit simulator system and method