Vaughn Betz

Person

North York, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 11,755,810
- Issue date Sep 12, 2023
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Characterization of power delivery network in field programmable ga...
- Patent number 11,018,668
- Issue date May 25, 2021
- The Governing Council of the University of Toronto
- Shuze Zhao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 10,783,310
- Issue date Sep 22, 2020
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for deriving signal activities for power analy...
- Patent number 10,417,362
- Issue date Sep 17, 2019
- Altera Corporation
- David Neto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placing and routing partial reconfiguratio...
- Patent number 10,242,146
- Issue date Mar 26, 2019
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 10,140,411
- Issue date Nov 27, 2018
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 9,754,065
- Issue date Sep 5, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and associated methods for parallelizing clustering and p...
- Patent number 9,594,859
- Issue date Mar 14, 2017
- Altera Corporation
- Ketan Padalia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 9,536,034
- Issue date Jan 3, 2017
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for utilizing constraints for the routing of a...
- Patent number 9,443,054
- Issue date Sep 13, 2016
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placing and routing partial reconfiguratio...
- Patent number 9,361,421
- Issue date Jun 7, 2016
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for protecting, optimizing, and reporting sync...
- Patent number 9,342,640
- Issue date May 17, 2016
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power-aware RAM processing
- Patent number 9,330,733
- Issue date May 3, 2016
- Altera Corporation
- Russell George Tessier
- G11 - INFORMATION STORAGE
Information Patent Grant
PLD architecture for flexible placement of IP function blocks
- Patent number 9,094,014
- Issue date Jul 28, 2015
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 8,935,650
- Issue date Jan 13, 2015
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for deriving signal activities for power analy...
- Patent number 8,898,603
- Issue date Nov 25, 2014
- Altera Corporation
- David Neto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for utilizing constraints for the routing of a...
- Patent number 8,745,566
- Issue date Jun 3, 2014
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 8,739,105
- Issue date May 27, 2014
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for power management in integrated circuits
- Patent number 8,732,635
- Issue date May 20, 2014
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for protecting, optimizing, and reporting sync...
- Patent number 8,732,639
- Issue date May 20, 2014
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLD architecture for flexible placement of IP function blocks
- Patent number 8,732,646
- Issue date May 20, 2014
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for placement and routing of partial reconfigu...
- Patent number 8,671,377
- Issue date Mar 11, 2014
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 8,589,849
- Issue date Nov 19, 2013
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing path-level skew optimization an...
- Patent number 8,572,530
- Issue date Oct 29, 2013
- Altera Corporation
- Ryan Fung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 8,533,652
- Issue date Sep 10, 2013
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for optimizing placement and routing
- Patent number 8,499,273
- Issue date Jul 30, 2013
- Altera Corporation
- Kimberley Anne Bozman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing cross-talk based booster wire...
- Patent number 8,468,487
- Issue date Jun 18, 2013
- Altera Corporation
- Zahir Parpia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for utilizing constraints for the routing of a...
- Patent number 8,443,325
- Issue date May 14, 2013
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLD architecture for flexible placement of IP function blocks
- Patent number 8,407,649
- Issue date Mar 26, 2013
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for performing parallel routing using a multi-...
- Patent number 8,296,709
- Issue date Oct 23, 2012
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR PERFORMING PARALLEL ROUTING USING A MULTI-...
- Publication number 20210073453
- Publication date Mar 11, 2021
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARACTERIZATION OF POWER DELIVERY NETWORK IN FIELD PROGRAMMABLE GA...
- Publication number 20190165782
- Publication date May 30, 2019
- The Governing Council of the University of Toronto
- Shuze ZHAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING PARALLEL ROUTING USING A MULTI-...
- Publication number 20190108303
- Publication date Apr 11, 2019
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20170337318
- Publication date Nov 23, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PARAMETER OPERATION OF AN FPGA
- Publication number 20170272073
- Publication date Sep 21, 2017
- Altera Corporation
- Vaughn Betz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Performing Parallel Routing Using a Multi-...
- Publication number 20170068768
- Publication date Mar 9, 2017
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Placing and Routing Partial Reconfiguratio...
- Publication number 20160267212
- Publication date Sep 15, 2016
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Performing Parallel Routing Using a Multi-...
- Publication number 20150154338
- Publication date Jun 4, 2015
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Field Programmable Gate-Array with Embedded Network-on-Chip Hardwar...
- Publication number 20150109024
- Publication date Apr 23, 2015
- Vaughn Timothy Betz
- Mohamed Saied Abdelfattah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS
- Publication number 20140258956
- Publication date Sep 11, 2014
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Placing and Routing Partial Reconfiguratio...
- Publication number 20140237441
- Publication date Aug 21, 2014
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Performing Parallel Routing Using a Multi-...
- Publication number 20140223403
- Publication date Aug 7, 2014
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20140210515
- Publication date Jul 31, 2014
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20140047405
- Publication date Feb 13, 2014
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Performing Parallel Routing Using A Multi-...
- Publication number 20130318491
- Publication date Nov 28, 2013
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20130214815
- Publication date Aug 22, 2013
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus For Performing Parallel Routing Using A Multi-...
- Publication number 20130007689
- Publication date Jan 3, 2013
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Placement and Routing of Partial Reconfigu...
- Publication number 20120227026
- Publication date Sep 6, 2012
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20120217998
- Publication date Aug 30, 2012
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Performing Parallel Routing Using a Multi-...
- Publication number 20120131535
- Publication date May 24, 2012
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods for Optimizing the Performance of Programmabl...
- Publication number 20120089958
- Publication date Apr 12, 2012
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for performing parallel routing using a multi-...
- Publication number 20100169858
- Publication date Jul 1, 2010
- Altera Corporation
- Vaughn Betz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods for Parallelizing Integrated Circuit Computer...
- Publication number 20100070979
- Publication date Mar 18, 2010
- Adrian Ludwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods for Adjusting Performance of Integrated Circuits
- Publication number 20090289696
- Publication date Nov 26, 2009
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS
- Publication number 20090224800
- Publication date Sep 10, 2009
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR REDUCING STATIC AND TOTAL POWER CONSUMPTION
- Publication number 20090138696
- Publication date May 28, 2009
- Altera Corporation
- David Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR OPTIMIZING THE PERFORMANCE OF PROGRAMMABL...
- Publication number 20080263490
- Publication date Oct 23, 2008
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS
- Publication number 20080263481
- Publication date Oct 23, 2008
- Altera Corporation
- David Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible RAM Clock Enable
- Publication number 20080253220
- Publication date Oct 16, 2008
- Altera Corporation
- Jinyong Yuan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Distributed memory in field-programmable gate array integrated circ...
- Publication number 20080231316
- Publication date Sep 25, 2008
- Altera Corporation
- David Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY

Vaughn Betz

Person

Patents Grantslast 30 patents

Method and apparatus for performing parallel routing using a multi-...

Characterization of power delivery network in field programmable ga...

Method and apparatus for performing parallel routing using a multi-...

Method and apparatus for deriving signal activities for power analy...

Method and apparatus for placing and routing partial reconfiguratio...

Method and apparatus for performing parallel routing using a multi-...

Method and apparatus for implementing soft constraints in tools use...

Apparatus and associated methods for parallelizing clustering and p...

Method and apparatus for performing parallel routing using a multi-...

Method and apparatus for utilizing constraints for the routing of a...

Method and apparatus for placing and routing partial reconfiguratio...

Method and apparatus for protecting, optimizing, and reporting sync...

Power-aware RAM processing

PLD architecture for flexible placement of IP function blocks

Method and apparatus for performing parallel routing using a multi-...

Method and apparatus for deriving signal activities for power analy...

Method and apparatus for utilizing constraints for the routing of a...

Method and apparatus for performing parallel routing using a multi-...

Apparatus and methods for power management in integrated circuits

Method and apparatus for protecting, optimizing, and reporting sync...

PLD architecture for flexible placement of IP function blocks

Method and apparatus for placement and routing of partial reconfigu...

Method and apparatus for implementing soft constraints in tools use...

Method and apparatus for performing path-level skew optimization an...

Method and apparatus for performing parallel routing using a multi-...

Systems and methods for optimizing placement and routing

Method and apparatus for implementing cross-talk based booster wire...

Method and apparatus for utilizing constraints for the routing of a...

PLD architecture for flexible placement of IP function blocks

Method and apparatus for performing parallel routing using a multi-...

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR PERFORMING PARALLEL ROUTING USING A MULTI-...

CHARACTERIZATION OF POWER DELIVERY NETWORK IN FIELD PROGRAMMABLE GA...

METHOD AND APPARATUS FOR PERFORMING PARALLEL ROUTING USING A MULTI-...

Method and Apparatus for Implementing Soft Constraints in Tools Use...

DYNAMIC PARAMETER OPERATION OF AN FPGA

Method and Apparatus for Performing Parallel Routing Using a Multi-...

Method and Apparatus for Placing and Routing Partial Reconfiguratio...

Method and Apparatus for Performing Parallel Routing Using a Multi-...

Field Programmable Gate-Array with Embedded Network-on-Chip Hardwar...

APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS

Method and Apparatus for Placing and Routing Partial Reconfiguratio...

Method and Apparatus for Performing Parallel Routing Using a Multi-...

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

Method and Apparatus for Implementing Soft Constraints in Tools Use...

Method and Apparatus for Performing Parallel Routing Using A Multi-...

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

Method and Apparatus For Performing Parallel Routing Using A Multi-...

Method and Apparatus for Placement and Routing of Partial Reconfigu...

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

Method and Apparatus for Performing Parallel Routing Using a Multi-...

Apparatus and Methods for Optimizing the Performance of Programmabl...

Method and apparatus for performing parallel routing using a multi-...

Apparatus and Methods for Parallelizing Integrated Circuit Computer...

Apparatus and Methods for Adjusting Performance of Integrated Circuits

PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS

SYSTEMS AND METHODS FOR REDUCING STATIC AND TOTAL POWER CONSUMPTION

APPARATUS AND METHODS FOR OPTIMIZING THE PERFORMANCE OF PROGRAMMABL...

APPARATUS AND METHODS FOR POWER MANAGEMENT IN INTEGRATED CIRCUITS

Flexible RAM Clock Enable

Distributed memory in field-programmable gate array integrated circ...