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Veeresh V. DESHPANDE
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Leuven, BE
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Patents Grants
last 30 patents
Information
Patent Grant
Method for forming a heterojunction bipolar transistor and a hetero...
Patent number
11,205,716
Issue date
Dec 21, 2021
Imec VZW
Veeresh Vidyadhar Deshpande
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Buried electrode geometry for lowering surface losses in supercondu...
Patent number
10,546,992
Issue date
Jan 28, 2020
International Business Machines Corporation
Andreas Fuhrer
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Method for Forming a Heterojunction Bipolar Transistor and a Hetero...
Publication number
20200203509
Publication date
Jun 25, 2020
IMEC vzw
Veeresh Vidyadhar Deshpande
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
BURIED ELECTRODE GEOMETRY FOR LOWERING SURFACE LOSSES IN SUPERCONDU...
Publication number
20200006619
Publication date
Jan 2, 2020
International Business Machines Corporation
Andreas FUHRER
G06 - COMPUTING CALCULATING COUNTING