Venkat Iyer

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods of creating exposed cavities in molded electronic devices
- Patent number 11,723,151
- Issue date Aug 8, 2023
- Flex Ltd.
- Dongkai Shangguan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of creating exposed cavities in molded electronic devices
- Patent number 11,304,302
- Issue date Apr 12, 2022
- Flex Ltd.
- Dongkai Shangguan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
System in package with double side mounted board
- Patent number 10,896,877
- Issue date Jan 19, 2021
- Flex Ltd.
- Cheng Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package and method for making the same
- Patent number 9,159,656
- Issue date Oct 13, 2015
- Fairchild Semiconductor Corporation
- Oseob Jeon
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor die package and method for making the same
- Patent number 8,664,752
- Issue date Mar 4, 2014
- Fairchild Semiconductor Corporation
- Oseob Jeon
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor die package including multiple dies and a common node...
- Patent number 8,212,361
- Issue date Jul 3, 2012
- Fairchild Semiconductor Corporation
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package and method for making the same
- Patent number 8,183,088
- Issue date May 22, 2012
- Fairchild Semiconductor Corporation
- Oseob Jeon
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor die package using leadframe and clip and method of ma...
- Patent number 8,058,107
- Issue date Nov 15, 2011
- Erwin Victor R. Cruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package and method for making the same
- Patent number 7,772,681
- Issue date Aug 10, 2010
- Fairchild Semiconductor Corporation
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package including multiple dies and a common node...
- Patent number 7,618,896
- Issue date Nov 17, 2009
- Fairchild Semiconductor Corporation
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die package using leadframe and clip and method of ma...
- Patent number 7,285,849
- Issue date Oct 23, 2007
- Fairchild Semiconductor Corporation
- Erwin Victor R. Cruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to manufacture a universal footprint for a package with expo...
- Patent number 7,256,479
- Issue date Aug 14, 2007
- Fairchild Semiconductor Corporation
- Jonathan A. Noquil
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES
- Publication number 20240040703
- Publication date Feb 1, 2024
- Flex Ltd.
- Dongkai Shangguan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES
- Publication number 20220330435
- Publication date Oct 13, 2022
- Flex Ltd.
- Dongkai Shangguan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES
- Publication number 20210100106
- Publication date Apr 1, 2021
- Flex Ltd.
- Dongkai Shangguan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME
- Publication number 20140167238
- Publication date Jun 19, 2014
- Fairchild Semiconductor Corporation
- Oseob Jeon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME
- Publication number 20120181675
- Publication date Jul 19, 2012
- Oseob Jeon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE PACKAGE INCLUDING MULTIPLE DIES AND A COMMON NODE...
- Publication number 20120064667
- Publication date Mar 15, 2012
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME
- Publication number 20100258925
- Publication date Oct 14, 2010
- Oseob Jeon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE PACKAGE INCLUDING MULTIPLE DIES AND A COMMON NODE...
- Publication number 20100090331
- Publication date Apr 15, 2010
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE PACKAGE USING LEADFRAME AND CLIP AND METHOD OF MA...
- Publication number 20080044946
- Publication date Feb 21, 2008
- Erwin Victor R. Cruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor die package including multiple dies and a common node...
- Publication number 20070249092
- Publication date Oct 25, 2007
- Rajeev Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor die package using leadframe and clip and method of ma...
- Publication number 20070114352
- Publication date May 24, 2007
- Erwin Victor R. Cruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor die package and method for making the same
- Publication number 20070001278
- Publication date Jan 4, 2007
- Oseob Jeon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to manufacture a universal footprint for a package with expo...
- Publication number 20060151861
- Publication date Jul 13, 2006
- Jonathan A. Noquil
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Venkat Iyer

Person

Patents Grantslast 30 patents

Methods of creating exposed cavities in molded electronic devices

Methods of creating exposed cavities in molded electronic devices

System in package with double side mounted board

Semiconductor die package and method for making the same

Semiconductor die package and method for making the same

Semiconductor die package including multiple dies and a common node...

Semiconductor die package and method for making the same

Semiconductor die package using leadframe and clip and method of ma...

Semiconductor die package and method for making the same

Semiconductor die package including multiple dies and a common node...

Semiconductor die package using leadframe and clip and method of ma...

Method to manufacture a universal footprint for a package with expo...

Patents Applicationslast 30 patents

METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES

METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES

METHODS OF CREATING EXPOSED CAVITIES IN MOLDED ELECTRONIC DEVICES

SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME

SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME

SEMICONDUCTOR DIE PACKAGE INCLUDING MULTIPLE DIES AND A COMMON NODE...

SEMICONDUCTOR DIE PACKAGE AND METHOD FOR MAKING THE SAME

SEMICONDUCTOR DIE PACKAGE INCLUDING MULTIPLE DIES AND A COMMON NODE...

SEMICONDUCTOR DIE PACKAGE USING LEADFRAME AND CLIP AND METHOD OF MA...

Semiconductor die package including multiple dies and a common node...

Semiconductor die package using leadframe and clip and method of ma...

Semiconductor die package and method for making the same

Method to manufacture a universal footprint for a package with expo...