Venkat Iyer

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sync regeneration in a universal serial bus
- Patent number 6,724,848
- Issue date Apr 20, 2004
- Intel Corporation
- Venkat Iyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bus controller and associated device drivers for use to control a p...
- Patent number 6,629,186
- Issue date Sep 30, 2003
- Intel Corporation
- John I. Garney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual termination serial data bus with pull-up current source
- Patent number 6,593,768
- Issue date Jul 15, 2003
- Intel Corporation
- Venkat Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel bit stuffing for a serial data transfer protocol
- Patent number 6,567,423
- Issue date May 20, 2003
- Intel Corporation
- Venkat Iyer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital system having a peripheral bus structure with at least one...
- Patent number 6,546,018
- Issue date Apr 8, 2003
- Intel Corporation
- John I. Garney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O peripheral device for use in a store-and-forward segment of a p...
- Patent number 6,389,501
- Issue date May 14, 2002
- Intel Corporation
- John I. Garney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating both a uniform duty cycle clock...
- Patent number 6,088,811
- Issue date Jul 11, 2000
- Intel Corporation
- Vui Yong Liew
- G06 - COMPUTING CALCULATING COUNTING

Venkat Iyer

Person

Patents Grantslast 30 patents

Sync regeneration in a universal serial bus

Bus controller and associated device drivers for use to control a p...

Dual termination serial data bus with pull-up current source

Parallel bit stuffing for a serial data transfer protocol

Digital system having a peripheral bus structure with at least one...

I/O peripheral device for use in a store-and-forward segment of a p...

Method and apparatus for generating both a uniform duty cycle clock...