Venkatraghavan Bringivijayaraghavan

Person

Tamilnadu, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Processing unit and method for computing a convolution using a hard...
- Patent number 11,669,733
- Issue date Jun 6, 2023
- MARVELL ASIA PTE. LTD.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port memory architecture for a systolic array
- Patent number 11,580,059
- Issue date Feb 14, 2023
- MARVELL ASIA PTE. LTD.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-sense amplifier based access to a single port of a memory cell
- Patent number 11,545,198
- Issue date Jan 3, 2023
- Marvell Asia Pte, Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Row address comparator for a row redundancy control circuit in a me...
- Patent number 11,302,415
- Issue date Apr 12, 2022
- Marvell Asia Pte, Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple sense amplifier and data path-based pseudo dual port SRAM
- Patent number 11,024,347
- Issue date Jun 1, 2021
- Marvell Asia Pte, Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Skewed sense amplifier for single-ended sensing
- Patent number 10,964,357
- Issue date Mar 30, 2021
- Marvell Asia Pte., Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist
- Patent number 10,600,474
- Issue date Mar 24, 2020
- GLOBALFOUNDRIES Inc.
- Sreenivasula Reddy Dhani Reddy
- G11 - INFORMATION STORAGE
Information Patent Grant
Column-dependent positive voltage boost for memory cell supply voltage
- Patent number 10,522,217
- Issue date Dec 31, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Intracycle bitline restore in high performance memory
- Patent number 10,510,384
- Issue date Dec 17, 2019
- GLOBALFOUNDRIES U.S. INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated level translator
- Patent number 10,395,700
- Issue date Aug 27, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist
- Patent number 10,381,069
- Issue date Aug 13, 2019
- GLOBALFOUNDRIES Inc.
- Sreenivasula Reddy Dhani Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bending circuit for static random access memory (SRAM) self-timer
- Patent number 10,217,507
- Issue date Feb 26, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line strapping scheme for high density SRAM
- Patent number 10,199,095
- Issue date Feb 5, 2019
- GLOBALFOUNDRIES Inc.
- Dhani Reddy Sreenivasula Reddy
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid stack write driver
- Patent number 10,186,312
- Issue date Jan 22, 2019
- GLOBALFOUNDRIES Inc.
- Arjun Sankar
- G11 - INFORMATION STORAGE
Information Patent Grant
Read and write scheme for high density SRAM
- Patent number 10,176,857
- Issue date Jan 8, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier latch circuit and sense amplifier multiplexed latch...
- Patent number 10,170,164
- Issue date Jan 1, 2019
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated level translator and latch for fence architecture
- Patent number 10,020,809
- Issue date Jul 10, 2018
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems, circuits, and methods for charge sharing
- Patent number 9,905,279
- Issue date Feb 27, 2018
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline driver with integrated voltage level shift function
- Patent number 9,881,669
- Issue date Jan 30, 2018
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Minimization of bias temperature instability (BTI) degradation in c...
- Patent number 9,859,873
- Issue date Jan 2, 2018
- International Business Machines Corporation
- Navin Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High performance multiplexed latches
- Patent number 9,787,292
- Issue date Oct 10, 2017
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier and latching scheme
- Patent number 9,761,285
- Issue date Sep 12, 2017
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Address based memory data path programming scheme
- Patent number 9,721,628
- Issue date Aug 1, 2017
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, circuits, and methods for charge sharing
- Patent number 9,607,668
- Issue date Mar 28, 2017
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit to improve SRAM stability
- Patent number 9,570,155
- Issue date Feb 14, 2017
- GLOBALFOUNDRIES Inc.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Data aware write scheme for SRAM
- Patent number 9,570,156
- Issue date Feb 14, 2017
- GLOBALFOUNDRIES Inc.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Boost control to improve SRAM write operation
- Patent number 9,548,104
- Issue date Jan 17, 2017
- International Business Machines Corporation
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
High performance sense amplifier
- Patent number 9,437,282
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES INC.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked memory device control
- Patent number 9,405,468
- Issue date Aug 2, 2016
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked memory device control
- Patent number 9,400,602
- Issue date Jul 26, 2016
- GLOBALFOUNDRIES Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Asymmetric Read-Write Sequence for Interconnected Dies
- Publication number 20240070093
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Hyun Yoo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM
- Publication number 20210287725
- Publication date Sep 16, 2021
- Marvell Asia Pte, Ltd.
- Venkatraghavan BRINGIVIJAYARAGHAVAN
- G11 - INFORMATION STORAGE
Information Patent Application
PROCESSING UNIT AND METHOD FOR COMPUTING A CONVOLUTION USING A HARD...
- Publication number 20210192336
- Publication date Jun 24, 2021
- Marvell International Ltd.
- Deepak I. Hanagandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW ADDRESS COMPARATOR FOR A ROW REDUNDANCY CONTROL CIRCUIT IN A ME...
- Publication number 20210183460
- Publication date Jun 17, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM
- Publication number 20210118477
- Publication date Apr 22, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY
- Publication number 20210034567
- Publication date Feb 4, 2021
- Marvell International Ltd.
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SKEWED SENSE AMPLIFIER FOR SINGLE-ENDED SENSING
- Publication number 20200342918
- Publication date Oct 29, 2020
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE ASSIST
- Publication number 20190279708
- Publication date Sep 12, 2019
- GLOBALFOUNDRIES INC.
- Sreenivasula Reddy Dhani Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WRITE ASSIST
- Publication number 20190244658
- Publication date Aug 8, 2019
- GLOBALFOUNDRIES INC.
- Sreenivasula Reddy Dhani Reddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTRACYCLE BITLINE RESTORE IN HIGH PERFORMANCE MEMORY
- Publication number 20190147924
- Publication date May 16, 2019
- GLOBALFOUNDRIES INC.
- Venkatraghavan BRINGIVIJAYARAGHAVAN
- G11 - INFORMATION STORAGE
Information Patent Application
READ AND WRITE SCHEME FOR HIGH DENSITY SRAM
- Publication number 20180374523
- Publication date Dec 27, 2018
- GLOBALFOUNDRIES Inc.
- Venkatraghavan BRINGIVIJAYARAGHAVAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BENDING CIRCUIT FOR STATIC RANDOM ACCESS MEMORY (SRAM) SELF-TIMER
- Publication number 20180130521
- Publication date May 10, 2018
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED LEVEL TRANSLATOR AND LATCH FOR FENCE ARCHITECTURE
- Publication number 20180083629
- Publication date Mar 22, 2018
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER AND LATCHING SCHEME
- Publication number 20170249976
- Publication date Aug 31, 2017
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH PERFORMANCE MULTIPLEXED LATCHES
- Publication number 20170214394
- Publication date Jul 27, 2017
- GLOBALFOUNDRIES INC.
- Venkatraghavan Bringivijayaraghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING
- Publication number 20170162240
- Publication date Jun 8, 2017
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
DATA AWARE WRITE SCHEME FOR SRAM
- Publication number 20170053694
- Publication date Feb 23, 2017
- GLOBALFOUNDRIES INC.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Application
BOOST CONTROL TO IMPROVE SRAM WRITE OPERATION
- Publication number 20170004874
- Publication date Jan 5, 2017
- International Business Machines Corporation
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT TO IMPROVE SRAM STABILITY
- Publication number 20160365139
- Publication date Dec 15, 2016
- International Business Machines Corporation
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Application
MINIMIZATION OF BIAS TEMPERATURE INSTABILITY (BTI) DEGRADATION IN C...
- Publication number 20160164497
- Publication date Jun 9, 2016
- International Business Machines Corporation
- Navin Agarwal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Memory Device Control
- Publication number 20150332736
- Publication date Nov 19, 2015
- International Business Machines Corporation
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Stacked Memory Device Control
- Publication number 20150331767
- Publication date Nov 19, 2015
- International Business Machines Corporation
- Venkatraghavan Bringivijayaraghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING
- Publication number 20140369146
- Publication date Dec 18, 2014
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING
- Publication number 20140071777
- Publication date Mar 13, 2014
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND PATHS, APPARATUSES, MEMORIES, AND METHODS FOR PROVIDING INT...
- Publication number 20130329503
- Publication date Dec 12, 2013
- Micron Technology, Inc.
- Venkatraghavan Bringivijayaraghavan
- G11 - INFORMATION STORAGE

Venkatraghavan Bringivijayaraghavan

Person

Patents Grantslast 30 patents

Processing unit and method for computing a convolution using a hard...

Multi-port memory architecture for a systolic array

Multi-sense amplifier based access to a single port of a memory cell

Row address comparator for a row redundancy control circuit in a me...

Multiple sense amplifier and data path-based pseudo dual port SRAM

Skewed sense amplifier for single-ended sensing

Write assist

Column-dependent positive voltage boost for memory cell supply voltage

Intracycle bitline restore in high performance memory

Integrated level translator

Write assist

Bending circuit for static random access memory (SRAM) self-timer

Bit line strapping scheme for high density SRAM

Hybrid stack write driver

Read and write scheme for high density SRAM

Sense amplifier latch circuit and sense amplifier multiplexed latch...

Integrated level translator and latch for fence architecture

Systems, circuits, and methods for charge sharing

Wordline driver with integrated voltage level shift function

Minimization of bias temperature instability (BTI) degradation in c...

High performance multiplexed latches

Sense amplifier and latching scheme

Address based memory data path programming scheme

Systems, circuits, and methods for charge sharing

Circuit to improve SRAM stability

Data aware write scheme for SRAM

Boost control to improve SRAM write operation

High performance sense amplifier

Stacked memory device control

Stacked memory device control

Patents Applicationslast 30 patents

Asymmetric Read-Write Sequence for Interconnected Dies

MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM

PROCESSING UNIT AND METHOD FOR COMPUTING A CONVOLUTION USING A HARD...

ROW ADDRESS COMPARATOR FOR A ROW REDUNDANCY CONTROL CIRCUIT IN A ME...

MULTIPLE SENSE AMPLIFIER AND DATA PATH-BASED PSEUDO DUAL PORT SRAM

MULTI-PORT MEMORY ARCHITECTURE FOR A SYSTOLIC ARRAY

SKEWED SENSE AMPLIFIER FOR SINGLE-ENDED SENSING

WRITE ASSIST

WRITE ASSIST

INTRACYCLE BITLINE RESTORE IN HIGH PERFORMANCE MEMORY

READ AND WRITE SCHEME FOR HIGH DENSITY SRAM

BENDING CIRCUIT FOR STATIC RANDOM ACCESS MEMORY (SRAM) SELF-TIMER

INTEGRATED LEVEL TRANSLATOR AND LATCH FOR FENCE ARCHITECTURE

SENSE AMPLIFIER AND LATCHING SCHEME

HIGH PERFORMANCE MULTIPLEXED LATCHES

SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING

DATA AWARE WRITE SCHEME FOR SRAM

BOOST CONTROL TO IMPROVE SRAM WRITE OPERATION

CIRCUIT TO IMPROVE SRAM STABILITY

MINIMIZATION OF BIAS TEMPERATURE INSTABILITY (BTI) DEGRADATION IN C...

Stacked Memory Device Control

Stacked Memory Device Control

SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING

SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING

COMMAND PATHS, APPARATUSES, MEMORIES, AND METHODS FOR PROVIDING INT...