Victor E. Augsburg

Person

Cary, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power efficient instruction prefetch mechanism
- Patent number 8,661,229
- Issue date Feb 25, 2014
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache locking without interference from normal allocations
- Patent number 8,527,713
- Issue date Sep 3, 2013
- QUALCOMM Incorporated
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation method and apparatus
- Patent number 8,239,657
- Issue date Aug 7, 2012
- QUALCOMM Incorporated
- Brian Joseph Kopec
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Speculative instruction issue in a simultaneously multithreaded pro...
- Patent number 7,725,684
- Issue date May 25, 2010
- International Business Machines Corporation
- Victor R. Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency insensitive FIFO signaling protocol
- Patent number 7,725,625
- Issue date May 25, 2010
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer manipulation
- Patent number 7,721,067
- Issue date May 18, 2010
- QUALCOMM Incorporated
- Brian Joseph Kopec
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for managing cache partitioning using a dynami...
- Patent number 7,650,466
- Issue date Jan 19, 2010
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power efficient instruction prefetch mechanism
- Patent number 7,587,580
- Issue date Sep 8, 2009
- QUALCOMM Corporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency insensitive FIFO signaling protocol
- Patent number 7,454,538
- Issue date Nov 18, 2008
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for predicting unaligned memory access
- Patent number 7,437,537
- Issue date Oct 14, 2008
- QUALCOMM Incorporated
- Jeffrey Todd Bridges
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
TLB lock indicator
- Patent number 7,426,626
- Issue date Sep 16, 2008
- QUALCOMM Incorporated
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative instruction issue in a simultaneously multithreaded pro...
- Patent number 7,366,877
- Issue date Apr 29, 2008
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for optimizing translation lookaside buffer entries
- Patent number 7,366,869
- Issue date Apr 29, 2008
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global modified indicator to reduce power consumption on cache miss
- Patent number 7,330,941
- Issue date Feb 12, 2008
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip bus with automatic pipeline stage insertion for ti...
- Patent number 7,296,175
- Issue date Nov 13, 2007
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-ordering a first request within a FIFO request queue to a differ...
- Patent number 7,035,958
- Issue date Apr 25, 2006
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single request data transfer regardless of size and alignment
- Patent number 6,993,619
- Issue date Jan 31, 2006
- International Business Machines Corporation
- Victor E. Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficiently calculating a branch target address
- Patent number 6,948,053
- Issue date Sep 20, 2005
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for moving snoop pushes to the front of a request queue
- Patent number 6,907,502
- Issue date Jun 14, 2005
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip bus with automatic pipeline stage insertion for ti...
- Patent number 6,834,378
- Issue date Dec 21, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for tracing program instructions before and after...
- Patent number 6,826,747
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing power in a snooping cache based multiprocessor environment
- Patent number 6,826,656
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-encoding illegal OP codes into a single illegal OP code to accom...
- Patent number 6,816,962
- Issue date Nov 9, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor environment supporting variable-sized coherency tran...
- Patent number 6,807,608
- Issue date Oct 19, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for tracing program execution within a superscala...
- Patent number 6,513,134
- Issue date Jan 28, 2003
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for tracing program execution within a processor...
- Patent number 5,996,092
- Issue date Nov 30, 1999
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Power Efficient Instruction Prefetch Mechanism
- Publication number 20090210663
- Publication date Aug 20, 2009
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency Insensitive FIFO Signaling Protocol
- Publication number 20080281996
- Publication date Nov 13, 2008
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Translation Method and Apparatus
- Publication number 20080189506
- Publication date Aug 7, 2008
- Brian Joseph Kopec
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative Instruction Issue in a Simultaneously Multithreaded Pro...
- Publication number 20080189521
- Publication date Aug 7, 2008
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache locking without interference from normal allocations
- Publication number 20070180199
- Publication date Aug 2, 2007
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translation lookaside buffer manipulation
- Publication number 20070174584
- Publication date Jul 26, 2007
- Brian Joseph Kopec
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Updating multiple levels of translation lookaside buffers (TLBs) field
- Publication number 20070094476
- Publication date Apr 26, 2007
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for managing cache partitioning
- Publication number 20070067574
- Publication date Mar 22, 2007
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TLB lock indicator
- Publication number 20070050594
- Publication date Mar 1, 2007
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preventing multiple translation lookaside buffer accesses for a sam...
- Publication number 20070005933
- Publication date Jan 4, 2007
- Brian Joseph Kopec
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Latency insensitive FIFO signaling protocol
- Publication number 20060259669
- Publication date Nov 16, 2006
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Global modified indicator to reduce power consumption on cache miss
- Publication number 20060218354
- Publication date Sep 28, 2006
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for optimizing translation lookaside buffer entries
- Publication number 20060212675
- Publication date Sep 21, 2006
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unaligned memory access prediction
- Publication number 20060184738
- Publication date Aug 17, 2006
- Jeffrey Todd Bridges
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power efficient instruction prefetch mechanism
- Publication number 20060174090
- Publication date Aug 3, 2006
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fractional-word writable architected register for direct accumulati...
- Publication number 20060174066
- Publication date Aug 3, 2006
- Jeffrey Todd Bridges
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single request data transfer regardless of size and alignment
- Publication number 20060031705
- Publication date Feb 9, 2006
- Victor R. Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative instruction issue in a simultaneously multithreaded pro...
- Publication number 20050060518
- Publication date Mar 17, 2005
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a chip bus with automatic pipeline stage insertion for ti...
- Publication number 20050055655
- Publication date Mar 10, 2005
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-THREADED MICROPROCESSOR WITH QUEUE FLUSHING
- Publication number 20040226011
- Publication date Nov 11, 2004
- International Business Machines Corporation
- Victor R. Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE REQUEST DATA TRANSFER REGARDLESS OF SIZE AND ALIGNMENT
- Publication number 20040193772
- Publication date Sep 30, 2004
- International Business Machines Corporation
- Victor E. Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reordering of requests between an initiator and the request queue o...
- Publication number 20040068603
- Publication date Apr 8, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a chip bus with automatic pipeline stage insertion for ti...
- Publication number 20040068707
- Publication date Apr 8, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for moving snoop pushes to the front of a request queue
- Publication number 20040068623
- Publication date Apr 8, 2004
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficiently calculating a branch target address
- Publication number 20030163677
- Publication date Aug 28, 2003
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Re-encoding illegal OP codes into a single illegal OP code to accom...
- Publication number 20030163670
- Publication date Aug 28, 2003
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiprocessor environment supporting variable-sized coherency tran...
- Publication number 20030159005
- Publication date Aug 21, 2003
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing power in a snooping cache based multiprocessor environment
- Publication number 20030145174
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Victor Roberts Augsburg
- G06 - COMPUTING CALCULATING COUNTING

Victor E. Augsburg

Person

Patents Grantslast 30 patents

Power efficient instruction prefetch mechanism

Cache locking without interference from normal allocations

Address translation method and apparatus

Speculative instruction issue in a simultaneously multithreaded pro...

Latency insensitive FIFO signaling protocol

Translation lookaside buffer manipulation

Method and apparatus for managing cache partitioning using a dynami...

Power efficient instruction prefetch mechanism

Latency insensitive FIFO signaling protocol

Methods and apparatus for predicting unaligned memory access

TLB lock indicator

Speculative instruction issue in a simultaneously multithreaded pro...

Method and system for optimizing translation lookaside buffer entries

Global modified indicator to reduce power consumption on cache miss

System on a chip bus with automatic pipeline stage insertion for ti...

Re-ordering a first request within a FIFO request queue to a differ...

Single request data transfer regardless of size and alignment

Efficiently calculating a branch target address

Method for moving snoop pushes to the front of a request queue

System on a chip bus with automatic pipeline stage insertion for ti...

System and method for tracing program instructions before and after...

Reducing power in a snooping cache based multiprocessor environment

Re-encoding illegal OP codes into a single illegal OP code to accom...

Multiprocessor environment supporting variable-sized coherency tran...

System and method for tracing program execution within a superscala...

System and method for tracing program execution within a processor...

Patents Applicationslast 30 patents

Power Efficient Instruction Prefetch Mechanism

Latency Insensitive FIFO Signaling Protocol

Address Translation Method and Apparatus

Speculative Instruction Issue in a Simultaneously Multithreaded Pro...

Cache locking without interference from normal allocations

Translation lookaside buffer manipulation

Updating multiple levels of translation lookaside buffers (TLBs) field

Method and apparatus for managing cache partitioning

TLB lock indicator

Preventing multiple translation lookaside buffer accesses for a sam...

Latency insensitive FIFO signaling protocol

Global modified indicator to reduce power consumption on cache miss

Method and system for optimizing translation lookaside buffer entries

Unaligned memory access prediction

Power efficient instruction prefetch mechanism

Fractional-word writable architected register for direct accumulati...

Single request data transfer regardless of size and alignment

Speculative instruction issue in a simultaneously multithreaded pro...

System on a chip bus with automatic pipeline stage insertion for ti...

MULTI-THREADED MICROPROCESSOR WITH QUEUE FLUSHING

SINGLE REQUEST DATA TRANSFER REGARDLESS OF SIZE AND ALIGNMENT

Reordering of requests between an initiator and the request queue o...

System on a chip bus with automatic pipeline stage insertion for ti...

Method for moving snoop pushes to the front of a request queue

Efficiently calculating a branch target address

Re-encoding illegal OP codes into a single illegal OP code to accom...

Multiprocessor environment supporting variable-sized coherency tran...

Reducing power in a snooping cache based multiprocessor environment