Victor Sutcliffe

Person

Frisco, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor interconnect
- Patent number 8,860,147
- Issue date Oct 14, 2014
- Texas Instruments Incorporated
- Amitava Chatterjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for selective deposition of a thin self-assembled monolayer
- Patent number 7,728,436
- Issue date Jun 1, 2010
- IMEC
- Caroline Whelan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for selective deposition of a thin self-assembled monolayer
- Patent number 7,368,377
- Issue date May 6, 2008
- Interuniversitair Microelektronica Centrum (IMEC) VZW
- Caroline Whelan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Extraction of interconnect parasitics
- Patent number 7,071,710
- Issue date Jul 4, 2006
- Texas Instruments Incorporated
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Grant
Extraction of interconnect parasitics
- Patent number 6,819,123
- Issue date Nov 16, 2004
- Texas Instruments Incorporated
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Grant
Method of forming a memory cell with self-aligned contacts
- Patent number 6,352,890
- Issue date Mar 5, 2002
- Texas Instruments Incorporated
- Victor C. Sutcliffe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a via having sloped sidewalls
- Patent number 5,162,261
- Issue date Nov 10, 1992
- Texas Instruments Incorporated
- Clyde R. Fuller
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR INTERCONNECT
- Publication number 20090134471
- Publication date May 28, 2009
- Amitava Chatterjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR SELECTIVE DEPOSITION OF A THIN SELF-ASSEMBLED MONOLAYER
- Publication number 20080105979
- Publication date May 8, 2008
- Interuniversitair Microelektronica Centrum (IMEC)
- Caroline Whelan
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for selective deposition of a thin self-assembled monolayer
- Publication number 20060128142
- Publication date Jun 15, 2006
- Caroline Whelan
- B82 - NANO-TECHNOLOGY
Information Patent Application
Extraction of interconnect parasitics
- Publication number 20050012558
- Publication date Jan 20, 2005
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Application
Extraction of interconnect parasitics
- Publication number 20030052700
- Publication date Mar 20, 2003
- Andrew Marshall
- G01 - MEASURING TESTING
Information Patent Application
Method of forming a memory cell with self-aligned contacts
- Publication number 20020053694
- Publication date May 9, 2002
- Victor C. Sutcliffe
- H01 - BASIC ELECTRIC ELEMENTS

Victor Sutcliffe

Person

Patents Grantslast 30 patents

Semiconductor interconnect

Method for selective deposition of a thin self-assembled monolayer

Method for selective deposition of a thin self-assembled monolayer

Extraction of interconnect parasitics

Extraction of interconnect parasitics

Method of forming a memory cell with self-aligned contacts

Method of forming a via having sloped sidewalls

Patents Applicationslast 30 patents

SEMICONDUCTOR INTERCONNECT

METHOD FOR SELECTIVE DEPOSITION OF A THIN SELF-ASSEMBLED MONOLAYER

Method for selective deposition of a thin self-assembled monolayer

Extraction of interconnect parasitics

Extraction of interconnect parasitics

Method of forming a memory cell with self-aligned contacts