Vikas Mehrotra

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Characterization and reduction of variation for integrated circuits
- Patent number 8,001,516
- Issue date Aug 16, 2011
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for implementing dummy fill for integrated circ...
- Patent number 7,757,195
- Issue date Jul 13, 2010
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,393,755
- Issue date Jul 1, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Characterization and reduction of variation for integrated circuits
- Patent number 7,383,521
- Issue date Jun 3, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,380,220
- Issue date May 27, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,363,598
- Issue date Apr 22, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of models in integrated circuit fabrication
- Patent number 7,360,179
- Issue date Apr 15, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,356,783
- Issue date Apr 8, 2008
- Cadence Design Systems, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,152,215
- Issue date Dec 19, 2006
- Praesagus, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy fill for integrated circuits
- Patent number 7,124,386
- Issue date Oct 17, 2006
- Praesagus, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CHARACTERIZATION AND REDUCTION OF VARIATION FOR INTEGRATED CIRCUITS
- Publication number 20090031261
- Publication date Jan 29, 2009
- Cadence Design Systems, Inc.
- Taber H. SMITH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and systems for implementing dummy fill for integrated circ...
- Publication number 20070101305
- Publication date May 3, 2007
- Praesagus, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of models in integrated circuit fabrication
- Publication number 20050235246
- Publication date Oct 20, 2005
- Praesagus, Inc., a Massachusetts corporation
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20050196964
- Publication date Sep 8, 2005
- Praesagus, Inc.
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Characterization and reduction of variation for integrated circuits
- Publication number 20050132306
- Publication date Jun 16, 2005
- Praesagus, Inc., a Massachusetts corporation
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20050051809
- Publication date Mar 10, 2005
- Praesagus, Inc., a Massachusetts corporation
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20050037522
- Publication date Feb 17, 2005
- Praesagus Inc., a Massachusetts Corporation
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20030226757
- Publication date Dec 11, 2003
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20030229479
- Publication date Dec 11, 2003
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy fill for integrated circuits
- Publication number 20030228714
- Publication date Dec 11, 2003
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of models in integrated circuit fabrication
- Publication number 20030229875
- Publication date Dec 11, 2003
- Taber H. Smith
- G06 - COMPUTING CALCULATING COUNTING

Vikas Mehrotra

Person

Patents Grantslast 30 patents

Characterization and reduction of variation for integrated circuits

Methods and systems for implementing dummy fill for integrated circ...

Dummy fill for integrated circuits

Characterization and reduction of variation for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Use of models in integrated circuit fabrication

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Patents Applicationslast 30 patents

CHARACTERIZATION AND REDUCTION OF VARIATION FOR INTEGRATED CIRCUITS

Methods and systems for implementing dummy fill for integrated circ...

Use of models in integrated circuit fabrication

Dummy fill for integrated circuits

Characterization and reduction of variation for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Dummy fill for integrated circuits

Use of models in integrated circuit fabrication